chore(ml): delete dead imports, parens, and the unused MappedI32::read

Cleanup of compiler warnings flagged by both local cargo check and the
cluster ensure-binary log. Per `feedback_no_hiding`, every site is
either deleted or wired up — no #[allow] suppressions.

Lib (5 sites):
- gpu_backtest_evaluator.rs:34 — drop unused DevicePtrMut.
- gpu_dqn_trainer.rs:49 — drop unused DevicePtrMut (8 device_ptr_mut
  calls don't need the trait import in current cudarc). Line 19852:
  drop unnecessary parens around `b * sh2`.
- training_loop.rs:20 — drop unused DevicePtrMut; unbrace single-
  symbol use at 5766.
- state_reset_registry.rs:4 — delete the 10-symbol use-block of slot
  constants. Names appear in description strings (documentation only),
  symbols are never referenced.

Examples (3 sites):
- alpha_dqn_h600_smoke.rs:181, 186 — drop COL_RAW_CLOSE, FEAT_DIM,
  FillCoeffs, FillModel imports.
- alpha_baseline.rs:79 — delete unused MappedI32::read. Batched path
  uses read_all for N-element action readback; the single-element
  method was leftover from the pre-batched legacy path.

Lib + examples now have zero removable warnings. The remaining
unsafe_block lints (each cudarc kernel launch needs unsafe) are
structural and not actionable under the project's -W unsafe-code
policy.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

crates/ml/examples/alpha_baseline.rs

@@ -76,10 +76,6 @@ impl MappedI32 {
         Ok(Self { host_ptr, dev_ptr: dev_raw.assume_init(), len })
     }
     fn dev_u64(&self) -> u64 { self.dev_ptr as u64 }
-    fn read(&self) -> i32 {
-        debug_assert!(self.len >= 1);
-        unsafe { std::ptr::read_volatile(self.host_ptr) }
-    }
     /// Read all `len` entries as a slice. Caller must ensure the
     /// associated GPU kernel has issued `__threadfence_system()` before
     /// the host accesses these values (volatile reads still happen

crates/ml/examples/alpha_dqn_h600_smoke.rs

@@ -178,12 +178,14 @@ use ml::cuda_pipeline::alpha_isv_slots::{
     Q_SPREAD_EMA_INDEX, RANDOM_BASELINE_MEAN_INDEX, RANDOM_BASELINE_STD_INDEX,
     RETURN_VS_RANDOM_EMA_INDEX,
 };
-use ml_alpha::fxcache_reader::{COL_RAW_CLOSE, FEAT_DIM};
+// `COL_RAW_CLOSE` / `FEAT_DIM` are no longer used directly in this
+// binary; the snapshot loader handles fxcache column layout internally.
 use ml::env::action_space::N_ACTIONS;
 use ml::env::execution_env::{
     EpisodeState, ExecutionEnv, ExecutionEnvConfig, SnapshotRow,
 };
-use ml::env::fill_model::{FillCoeffs, FillModel};
+// `FillCoeffs` / `FillModel` are loaded via the env::loaders module
+// and consumed inside ExecutionEnv — no direct references here.
 use ml::trainers::dqn::collect_dbn_files_recursive;
 
 const STATE_DIM: usize = 10;

crates/ml/src/cuda_pipeline/gpu_backtest_evaluator.rs

@@ -31,7 +31,7 @@
 
 use std::mem::ManuallyDrop;
 use std::sync::Arc;
-use cudarc::driver::{CudaEvent, CudaFunction, CudaGraph, CudaSlice, CudaStream, DevicePtr, DevicePtrMut, LaunchConfig, PushKernelArg};
+use cudarc::driver::{CudaEvent, CudaFunction, CudaGraph, CudaSlice, CudaStream, DevicePtr, LaunchConfig, PushKernelArg};
 use tracing::info;
 
 use ml_core::nvtx::NvtxRange;

crates/ml/src/cuda_pipeline/gpu_dqn_trainer.rs

@@ -46,7 +46,7 @@
 use std::sync::Arc;
 
 use cudarc::driver::{
-    CudaFunction, CudaSlice, CudaStream, DevicePtrMut, LaunchConfig, PushKernelArg,
+    CudaFunction, CudaSlice, CudaStream, LaunchConfig, PushKernelArg,
 };
 use tracing::info;
 
@@ -19849,7 +19849,7 @@ impl GpuDqnTrainer {
             cudarc::driver::sys::cuMemsetD32Async(
                 dh_s2_aux_accum_ptr,
                 0,
-                (b * sh2),
+                b * sh2,
                 self.stream.cu_stream(),
             );
             self.stream

crates/ml/src/trainers/dqn/state_reset_registry.rs

@@ -1,12 +1,10 @@
 //! Formal classification of every piece of training-time state by reset lifecycle.
 //! See `docs/superpowers/specs/2026-04-24-dqn-v2-unified-design.md` §4.A.1.
 
-use crate::cuda_pipeline::sp14_isv_slots::{
-    LOSS_CAP_INDEX, ALPHA_EMA_INDEX, WR_EMA_INDEX,
-    HOLD_COST_SCALE_INDEX, TARGET_HOLD_PCT_INDEX, HOLD_PCT_EMA_INDEX,
-    HOLD_REWARD_EMA_INDEX, N_STEP_INDEX,
-    AUX_CONF_THRESHOLD_INDEX, AUX_GATE_TEMP_INDEX,
-};
+// Slot-name constants (LOSS_CAP_INDEX, ALPHA_EMA_INDEX, …) are referenced
+// in the per-entry `description` string literals below for documentation;
+// no code path imports the symbols. The previous use-block was a stale
+// remnant from when the registry built its entries programmatically.
 
 /// Reset lifecycle category for a piece of training-time state.
 ///

crates/ml/src/trainers/dqn/trainer/training_loop.rs

@@ -17,7 +17,7 @@
 use std::sync::Arc;
 
 use anyhow::{Context, Result};
-use cudarc::driver::{CudaSlice, DevicePtrMut};
+use cudarc::driver::CudaSlice;
 use common::metrics::{questdb_sink, training_metrics};
 use tracing::{debug, info, warn};
 
@@ -5763,9 +5763,7 @@ impl DQNTrainer {
             // producers fire above (in the dueling block) and the
             // TD-error producer fires inside `read_sp18_td_error_mag_ema()`.
             {
-                use crate::cuda_pipeline::sp14_isv_slots::{
-                    V_SHARE_TREND_DIAG_INDEX,
-                };
+                use crate::cuda_pipeline::sp14_isv_slots::V_SHARE_TREND_DIAG_INDEX;
                 // Push the most-recent V_SHARE readings into the ring.
                 // The SP17 V_SHARE producer is launched above (in the
                 // dueling diag block via `read_v_share_per_branch`); we