diff --git a/crates/ml/src/trainers/dqn/state_reset_registry.rs b/crates/ml/src/trainers/dqn/state_reset_registry.rs
index dfb113ffb..16154dbf9 100644
--- a/crates/ml/src/trainers/dqn/state_reset_registry.rs
+++ b/crates/ml/src/trainers/dqn/state_reset_registry.rs
@@ -575,7 +575,7 @@ impl StateResetRegistry {
             RegistryEntry {
                 name: "sp5_budget_c51",
                 category: ResetCategory::FoldReset,
-                description: "ISV[BUDGET_C51_BASE=190..194) — per-branch C51 loss budget share. SP7 (2026-05-03): driven by the loss-balance controller using flatness-modulated target ratio (C51/IQN ≤ 1.0×flatness). Pearl A sentinel 0 at fold boundary; consumer-side bootstrap = C51_BOOTSTRAP_BUDGET = 0.05 in fused_training.rs::compute_adaptive_budgets. (Pearl 2 no longer writes this slot post-SP7.)",
+                description: "ISV[BUDGET_C51_BASE=190..194) — per-branch C51 loss budget share. SP7 (2026-05-03): will be driven by the loss-balance controller using flatness-modulated target ratio (C51/IQN ≤ 1.0×flatness). Pearl A sentinel 0 at fold boundary; consumer-side floor currently 0.05 (`fused_training.rs:3384`). (Pearl 2 will stop writing this slot in SP7 T6; T7 replaces the consumer floor with sentinel-aware bootstrap.)",
             },
             RegistryEntry {
                 name: "sp5_budget_iqn",
@@ -585,12 +585,12 @@ impl StateResetRegistry {
             RegistryEntry {
                 name: "sp5_budget_cql",
                 category: ResetCategory::FoldReset,
-                description: "ISV[BUDGET_CQL_BASE=198..202) — per-branch CQL loss budget share. SP7 (2026-05-03): driven by the loss-balance controller (`loss_balance_controller_kernel`) using flatness-modulated target ratio (CQL/IQN ≤ 2.0×(1−flatness)). Pearl A sentinel 0 at fold boundary; consumer-side bootstrap = CQL_BOOTSTRAP_BUDGET = 0.02 in fused_training.rs::compute_adaptive_budgets.",
+                description: "ISV[BUDGET_CQL_BASE=198..202) — per-branch CQL loss budget share. SP7 (2026-05-03): will be driven by the loss-balance controller (`loss_balance_controller_kernel`) using flatness-modulated target ratio (CQL/IQN ≤ 2.0×(1−flatness)). Pearl A sentinel 0 at fold boundary; consumer-side floor currently 0.02 (`fused_training.rs:3386`). (Pearl 2 will stop writing this slot in SP7 T6; T7 replaces the consumer floor with sentinel-aware bootstrap.)",
             },
             RegistryEntry {
                 name: "sp5_budget_ens",
                 category: ResetCategory::FoldReset,
-                description: "ISV[BUDGET_ENS_BASE=202..206) — per-branch ensemble loss budget share. SP7 (2026-05-03): consumer reads with sentinel-aware bootstrap = ENS_BOOTSTRAP_BUDGET = 0.02; Ens is currently not actively driven (no loss-balance target ratio defined for Ens vs IQN). Pearl A sentinel 0 at fold boundary. (Pearl 2 no longer writes this slot post-SP7.)",
+                description: "ISV[BUDGET_ENS_BASE=202..206) — per-branch ensemble loss budget share. SP7 (2026-05-03): consumer-side floor currently 0.02 (`fused_training.rs:3387`); Ens is currently not actively driven (no loss-balance target ratio defined for Ens vs IQN). Pearl A sentinel 0 at fold boundary. (Pearl 2 will stop writing this slot in SP7 T6; T7 replaces the consumer floor with sentinel-aware bootstrap.)",
             },
             RegistryEntry {
                 name: "sp5_flatness",
diff --git a/docs/dqn-wire-up-audit.md b/docs/dqn-wire-up-audit.md
index 9709f2550..b48bf138e 100644
--- a/docs/dqn-wire-up-audit.md
+++ b/docs/dqn-wire-up-audit.md
@@ -3884,6 +3884,7 @@ extended. No producer kernel yet — that arrives in the next commit.
 - T2 (commit ⟨pending⟩): 4 SP7 ResetEntries + corrected `sp5_budget_cql`
   description (was claiming a non-existent "regime_stability allocator")
   + clarified `sp5_budget_c51`/`sp5_budget_ens` to reflect SP7 ownership.
+  T2 polish landed (commit pending) — registry descriptions corrected to reflect current state vs T6/T7 future changes.
 - T3: kernel `.cu` file.
 - T4: build.rs cubin manifest.
 - T5: trainer struct + launcher fn.