From 79b8a4349108c9a786e76a0dd39fbcc5bc424578 Mon Sep 17 00:00:00 2001
From: jgrusewski <jgrusewski@localhost>
Date: Sun, 31 May 2026 12:11:02 +0200
Subject: [PATCH] =?UTF-8?q?style(rl):=20F1.4=20code=20review=20fixes=20?=
 =?UTF-8?q?=E2=80=94=20borrow=20+=20naming=20+=20format?=
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Code-quality review found 1 Important + 2 Minor; applied all 3:
- Important: launch_rl_regime_flat_count(&mut self) → (&self)
  GPU writes through device pointer are invisible to borrow checker;
  matches pattern of launch_rl_win_rate_ema_update (&self) at adjacent line.
- Minor: smem_bytes → smem (matches convention of 11 other launchers)
- Minor: removed column-padding alignment on 5 new struct fields + changed
  `///` doc comment to `//` for private field flat_count_d (matches surrounding
  private fields).

Zero functional change.
---
 crates/ml-alpha/src/trainer/integrated.rs | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/crates/ml-alpha/src/trainer/integrated.rs b/crates/ml-alpha/src/trainer/integrated.rs
index 14a603671..53554765c 100644
--- a/crates/ml-alpha/src/trainer/integrated.rs
+++ b/crates/ml-alpha/src/trainer/integrated.rs
@@ -694,12 +694,12 @@ pub struct IntegratedTrainer {
     // Regime observer (F1.4) — emits unified state-machine signals consumed
     // by Kelly (F2), v9 (F3), popart (F4), IQN τ (F5).
     _rl_regime_flat_count_module: Arc<CudaModule>,
-    rl_regime_flat_count_fn:      CudaFunction,
-    _rl_regime_observer_module:   Arc<CudaModule>,
-    rl_regime_observer_fn:        CudaFunction,
-    /// Per-step flat-count helper buffer: holds the block-reduce output
-    /// (number of accounts with lots==0) for one step. Length 1.
-    flat_count_d:                 CudaSlice<i32>,
+    rl_regime_flat_count_fn: CudaFunction,
+    _rl_regime_observer_module: Arc<CudaModule>,
+    rl_regime_observer_fn: CudaFunction,
+    // Per-step flat-count helper buffer: holds the block-reduce output
+    // (number of accounts with lots==0) for one step. Length 1.
+    flat_count_d: CudaSlice<i32>,
     // EMA producers feeding the new controllers.
     _rl_win_rate_ema_update_module: Arc<CudaModule>,
     rl_win_rate_ema_update_fn: CudaFunction,
@@ -3834,17 +3834,17 @@ impl IntegratedTrainer {
     /// Regime observer helper — block-reduce per-account flat count.
     /// Output: `flat_count_d[0]` = number of accounts with lots==0.
     /// Launch: Grid=(1,1,1), Block=(256,1,1), smem=256*sizeof(int).
-    pub fn launch_rl_regime_flat_count(&mut self, lots_d: &CudaSlice<i32>, b_size: usize) -> Result<()> {
+    pub fn launch_rl_regime_flat_count(&self, lots_d: &CudaSlice<i32>, b_size: usize) -> Result<()> {
         let mut args = RawArgs::new();
         args.push_ptr(lots_d.raw_ptr());
         args.push_ptr(self.flat_count_d.raw_ptr());
         args.push_i32(b_size as i32);
         let mut ptrs = args.build_arg_ptrs();
-        let smem_bytes = (256 * std::mem::size_of::<i32>()) as u32;
+        let smem = (256 * std::mem::size_of::<i32>()) as u32;
         unsafe {
             raw_launch(
                 self.rl_regime_flat_count_fn.cu_function(),
-                (1, 1, 1), (256, 1, 1), smem_bytes,
+                (1, 1, 1), (256, 1, 1), smem,
                 self.raw_stream,
                 &mut ptrs[..args.len()],
             ).map_err(|e| anyhow::anyhow!("rl_regime_flat_count: {:?}", e))?;