sp7(isv): allocate 16 ISV slots for loss-balance controller state

LB_DIFF_VAR_CQL_BASE=297, LB_SAMPLE_VAR_CQL_BASE=301,
LB_DIFF_VAR_C51_BASE=305, LB_SAMPLE_VAR_C51_BASE=309. Bumps SP5_SLOT_END
297 → 313 and SP5_PRODUCER_COUNT 123 → 139. Helper fns mirror the
existing budget_*/flatness/q_var_per_branch pattern. Layout fingerprint
extended. slot_layout_no_overlaps_and_total_correct asserts the new
total.

Audit doc Fix 31 stub added; will be extended commit-by-commit through
Tasks 2-9 of the SP7 plan.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

docs/dqn-wire-up-audit.md

@@ -3856,3 +3856,34 @@ This is a pure structural migration — orthogonal to Bug-1 contract drift, but
 References: Stale-B closes the last ⚠ Stale row from Fix 29's audit. `feedback_no_partial_refactor` (single launcher migrated alongside kernel signature change in one commit), `feedback_no_functionality_removal` (PNL_VS_TARGET / PNL_VS_STOP slots preserved — only their data source corrected; the audit's "drop the slots" alternative explicitly rejected), `feedback_no_hiding` (no fallback to z-normed reads remaining; kernel either gets real raw_close from `prices` or falls back to `unrealized=0` when `prices==NULL`, matching the existing `have_close=false` semantics for callers without OHLC data — same as pre-fix behaviour for the smoke-test paths), `feedback_no_cpu_compute_strict` n/a (zero new host-side compute), `feedback_no_htod_htoh_only_mapped_pinned` already satisfied (`prices_buf` is `MappedF32Buffer` post the prereq commit `4d966e62f`).
 
 **Fix 30 closure**: all four ⚠ Stale rows (#12 Stale-C, #13 Stale-B, #14/#15 Stale-A) and the one ❓ Ambiguous row (#18 Ambiguous-A) from Fix 29's deferred follow-ups are now resolved. Bug-1 contract drift triage is complete; the production hot path was already clean post-Fix-29's host-side `vol_normalizer` deletion, and the val/HPO/seed-phase derived metrics now read raw_close from the correct source on every path.
+
+### Fix 31: SP7 loss-balance controller — adaptive CQL/C51 budget ratio (2026-05-03, IN PROGRESS)
+
+**The bug.** At production scale (50-epoch baseline at HEAD `2fb7d7f57`,
+smoke `train-multi-seed-n4qv2` ep4-7) `grad_split_bwd cql=4.13` vs
+`iqn=0.07` (≈60×); magnitude Q-values within 0.003 of each other;
+`eval_dist eq=1.000` (full eval-collapse to Quarter via argmax). Root
+cause: per-branch CQL budget hardcoded to 0 by Pearl 2 and floored to
+0.02 in `compute_adaptive_budgets`. The "regime_stability allocator"
+docstring at `fused_training.rs:3409` was never implemented.
+
+**The fix.** New GPU controller `loss_balance_controller_kernel` writes
+adaptive per-branch budgets to the same ISV slots Pearl 2 used to
+zero. Math and rationale in
+`docs/superpowers/specs/2026-05-03-sp7-loss-balance-controller-design.md`.
+
+**Layer A landing (this commit, 2026-05-03)**: 16 new ISV slots
+`LB_DIFF_VAR_CQL_BASE` (297..301), `LB_SAMPLE_VAR_CQL_BASE` (301..305),
+`LB_DIFF_VAR_C51_BASE` (305..309), `LB_SAMPLE_VAR_C51_BASE` (309..313).
+`SP5_SLOT_END` 297→313; `SP5_PRODUCER_COUNT` 123→139. Wiener-buffer
+linear-span test asserts the new total. Layout fingerprint string
+extended. No producer kernel yet — that arrives in the next commit.
+
+**Subsequent landings** (this entry will be extended commit-by-commit):
+- T2: state-reset registry entries.
+- T3: kernel `.cu` file.
+- T4: build.rs cubin manifest.
+- T5: trainer struct + launcher fn.
+- T6: Pearl 2 contract change (drop CQL/C51/ENS args).
+- T7: launch site + sentinel-aware consumer + stale doc.
+- T9–T10: smoke + 50-epoch verification.