From cd149cdb5da304bdb05255c505550a600b53ef8a Mon Sep 17 00:00:00 2001 From: jgrusewski Date: Mon, 25 May 2026 10:43:09 +0200 Subject: [PATCH] =?UTF-8?q?fix(rl):=20gate=20controller=20target=200.02?= =?UTF-8?q?=E2=86=920.10,=20dead=20zone=200.5=C3=97/2=C3=97=20=E2=86=92=20?= =?UTF-8?q?0.2=C3=97/5=C3=97?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Controller oscillated: 3 dones at step 15k spiked EMA above 2×target, triggering thousands of steps of tightening that killed trades. Higher target (10% vs 2%) matches the natural trade frequency at b=16. Wider dead zone (5× above / 0.2× below) prevents single-batch spikes from triggering tighten/relax oscillation. Co-Authored-By: Claude Opus 4.7 --- crates/ml-alpha/cuda/rl_gate_threshold_controller.cu | 4 ++-- crates/ml-alpha/src/trainer/integrated.rs | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/crates/ml-alpha/cuda/rl_gate_threshold_controller.cu b/crates/ml-alpha/cuda/rl_gate_threshold_controller.cu index 8de10f656..440be8d0f 100644 --- a/crates/ml-alpha/cuda/rl_gate_threshold_controller.cu +++ b/crates/ml-alpha/cuda/rl_gate_threshold_controller.cu @@ -56,12 +56,12 @@ extern "C" __global__ void rl_gate_threshold_controller( float frd_long = isv[RL_FRD_GATE_THR_LONG_INDEX]; float frd_short = isv[RL_FRD_GATE_THR_SHORT_INDEX]; - if (dones_ema < target * 0.5f) { + if (dones_ema < target * 0.2f) { // Trades well below target — relax gates. conf_thr *= adjust; frd_long *= adjust; frd_short *= adjust; - } else if (dones_ema > target * 2.0f) { + } else if (dones_ema > target * 5.0f) { // Trades well above target — tighten gates. conf_thr /= adjust; frd_long /= adjust; diff --git a/crates/ml-alpha/src/trainer/integrated.rs b/crates/ml-alpha/src/trainer/integrated.rs index bc1e3cfab..1dff71100 100644 --- a/crates/ml-alpha/src/trainer/integrated.rs +++ b/crates/ml-alpha/src/trainer/integrated.rs @@ -1616,7 +1616,7 @@ impl IntegratedTrainer { (crate::rl::isv_slots::RL_PI_SAMPLE_P_MIN_INDEX, 0.015), (crate::rl::isv_slots::RL_OUTCOME_ALPHA_INDEX, 0.1), (crate::rl::isv_slots::RL_GATE_WARMUP_STEPS_INDEX, 10000.0), - (crate::rl::isv_slots::RL_GATE_DONES_TARGET_INDEX, 0.02), + (crate::rl::isv_slots::RL_GATE_DONES_TARGET_INDEX, 0.10), (crate::rl::isv_slots::RL_GATE_CONF_MIN_INDEX, 0.0), (crate::rl::isv_slots::RL_GATE_CONF_MAX_INDEX, 0.50), (crate::rl::isv_slots::RL_GATE_FRD_MIN_INDEX, 0.0),