feat(sp22-vnext): Phase F-3 — K=3 CE EMA producer + ISV slot

Adds observability infrastructure for Phase F smoke validation: new
ISV slot AUX_TRADE_OUTCOME_CE_EMA_INDEX = 538 tracks the K=3 head's
batch-mean sparse cross-entropy EMA. Producer kernel registered +
cubin-built; launcher wireup follows in Phase F-3b commit.

Changes:
- sp22_isv_slots.rs: new pub const AUX_TRADE_OUTCOME_CE_EMA_INDEX = 538
- gpu_dqn_trainer.rs ISV_TOTAL_DIM: 538 → 539
- NEW kernel aux_outcome_ce_ema_kernel.cu: single-thread single-block
  direct-to-ISV EMA writer with Pearl A first-observation bootstrap.
  Fixed α=0.05 (slow-moving observability). NULL-tolerant + NaN-guarded.
- build.rs: kernel registered; cubin compiles (3.2 KB)

Why dedicated kernel (not extension of aux_heads_loss_ema_update):
The K=2/K=5 EMA writes through Pearls A+D's 2-stage producer scratch.
Extending it would require allocating a new scratch slot, threading
Pearls A+D mapping, and touching apply_pearls_ad_kernel. The K=3
head's CE is OBSERVABILITY ONLY in this commit — no Pearls A+D
adaptive α needed. Minimum-scope direct-to-ISV path. Re-routable
through Pearls A+D if K=3 CE later becomes a controller anchor.

Smoke validation signal interpretation:
- Cold-start: ISV[538] = 0.0 (FoldReset sentinel)
- First step with B_valid > 0: Pearl A bootstrap → ISV[538] = first CE
- Typical uniform-K=3 cold-start CE: ln(3) ≈ 1.098
- Learning signal: CE drops from ~1.098 toward 0.5-0.7 over epochs
- Falsification signal: CE pinned at ln(3) for many epochs → head
  can't learn (label noise / under-capacity / outcomes unconditional)

Phase F-3b follow-up:
- Trainer launcher call after aux_heads_loss_ema_update
- HEALTH_DIAG snap layout extension + console column
- Reset registry entry (FoldReset sentinel 0)

Verification:
- cargo check -p ml clean.
- cargo test -p ml --lib → 1016/0 green.

Audit: docs/dqn-wire-up-audit.md Phase F-3 section.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

crates/ml/build.rs

@@ -849,6 +849,14 @@ fn main() {
         // dh_s2_aux_accum [B, 256] only consumes first 256 cols (plan_
         // params gradient is stop-grad).
         "strided_row_saxpy_kernel.cu",
+        // SP22 H6 vNext Phase F-3 (2026-05-14): K=3 trade-outcome head's
+        // sparse-CE EMA producer for observability. Single-thread
+        // single-block direct-to-ISV writer with Pearl A bootstrap.
+        // Writes ISV[AUX_TRADE_OUTCOME_CE_EMA_INDEX=538] every training
+        // step alongside the existing K=2/K=5 aux EMA producers.
+        // Dead code until launcher wired (next commit step in this
+        // phase).
+        "aux_outcome_ce_ema_kernel.cu",
         // SP22 H6 vNext Phase C (2026-05-14): per-env 3-slot softmax
         // extractor for the K=3 trade-outcome aux head. Copies
         // aux_outcome_softmax [n_envs, K=3] → prev_aux_outcome_probs