feat(sp20): Phase 1.1 sp20_stats_compute kernel

Component 5 / Kernel 3 of the SP20 fused-producer chain. Single-block
BLOCK=256 kernel reads `aux_logits [B, 3]` (the SP14-C aux head's
3-class direction logits) and emits `[aux_conf_p50, aux_conf_std]`
into a `MappedF32Buffer<2>`, where the per-row signal is
`aux_conf[i] = max_c softmax(logits[i, *])[c] - 1/3`.

p50 uses the inlined `sp4_histogram_p99` pattern (per-warp tile
binning + cumulative-from-bottom, no atomicAdd per
`feedback_no_atomicadd`); std uses two block tree-reductions sharing
one shmem tile sequentially. One fused kernel streams `aux_logits`
once for both stats per `pearl_fused_per_group_statistics_oracle`.

Phase 1.4 wires the production launch site atomically with the rest
of the SP20 reward chain per `feedback_no_partial_refactor`. This
commit lands kernel + Rust launcher + GPU oracle tests + build entry
+ audit-doc entry together so the kernel is independently verifiable
on RTX 3050 Ti (sm_86) and L40S (sm_89) before the EMA + controller
producers (Phase 1.2 + 1.3) reference its outputs.

Tests verify:
  - uniform logits → aux_conf = 0 → [p50, std] = [0, 0]
  - varied confidence (logit ramp 0 → 3) → matches CPU oracle
  - heterogeneous half-hot half-uniform → matches CPU oracle
  - empty batch → degenerate-guard writes [0, 0]

All 4 GPU oracle tests + 4 launcher unit tests pass on RTX 3050 Ti.
Test data uses per-row variance to avoid the
`pearl_sp4_histogram_warp_tile_undercount` lockstep-uniform trap
(concentrated values within one bin_width race the per-warp
non-atomic increments).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

crates/ml/build.rs

@@ -1359,6 +1359,26 @@ fn main() {
         // seeds + 1 scratch buffer + 4 registry entries + 4 dispatch
         // arms only.
         "dd_trajectory_kernel.cu",
+        // SP20 Phase 1.1 (2026-05-09): aux confidence p50/std stats
+        // producer. Single-block, BLOCK=256 kernel reading
+        // `aux_logits [B, 3]` (the SP14-C aux head's 3-class direction
+        // logits) and emitting `[p50, std]` of the per-row signal
+        // `aux_conf[i] = max_c softmax(logits[i, *])[c] - 1/3` into a
+        // `MappedF32Buffer<2>`. p50 uses the inlined `sp4_histogram_p99`
+        // pattern with cumulative-from-bottom (target = ⌈B/2⌉)
+        // substituted for cumulative-from-top, per
+        // `pearl_fused_per_group_statistics_oracle` (one fused stream
+        // for both stats) and `feedback_no_atomicadd` (per-warp tile
+        // binning + block tree-reduce sums; no atomicAdd anywhere).
+        // std uses two block tree-reductions sharing one shmem tile
+        // sequentially. Component 5 / Kernel 3 of the SP20 fused-
+        // producer chain (`sp20_emas_compute` + `sp20_controllers_
+        // compute` land in Phase 1.2 + 1.3). Phase 1.4 wires the
+        // production launch site; this commit adds kernel + Rust
+        // launcher (`sp20_stats_compute.rs`) + GPU oracle tests
+        // (`tests/sp20_stats_compute_test.rs`) atomically per
+        // `feedback_no_partial_refactor`.
+        "sp20_stats_compute_kernel.cu",
     ];
 
     // ALL kernels get common header (BF16 types + wrappers)