Complete bf16 elimination across all crates (ml, ml-core, ml-dqn, ml-ppo,
ml-supervised). Zero half::bf16, __nv_bfloat16, or CudaSlice<half::bf16>
references remain (verified by grep).
CUDA: All 60+ .cu kernels and .cuh headers converted to native float.
- Half-precision intrinsics (__hmul, __hadd, __hdiv) → float operators
- atomicAddBF16 → native atomicAdd(float)
- bf16 wrapper functions → f32 identity passthroughs
Rust: All CudaSlice<half::bf16> → CudaSlice<f32> across 90+ files.
- htod_f32_to_bf16/dtoh_bf16_to_f32 → htod_f32/dtoh_f32 (direct, no conversion)
- Deleted bf16 mirror infrastructure (DuelingWeightSetBf16, alloc_bf16_mirror, etc.)
- Renamed params_bf16→params_flat, d_value_logits_bf16→d_value_logits, etc.
- Fixed .to_f32() sed damage on Decimal::to_f32() and rng.f32()
FxCache: Single f32 disk format (was bf16/f64 dual-version).
- Deleted --bf16 CLI flag from precompute_features
- PVC cache files need regeneration via precompute_features
TF32 tensor cores activated via cublasLtMatmul CUBLAS_COMPUTE_32F — no
explicit TF32 types needed. Storage is pure f32 everywhere.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replaced 4 cudarc::nvrtc::compile_ptx() calls in ml-ppo cuda_nn with
compile_ptx_for_device() — native cubin via nvcc -O3 with disk cache.
Before: virtual PTX → driver JIT (no -O3, no arch targeting, ~100ms first launch)
After: native SASS for exact sm_XX, cached to disk, <10ms load
Files: lstm.rs (2 kernels), linear.rs (1), softmax.rs (1)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Experience collector: PinnedHostBuf<T> via cuMemHostAlloc(PORTABLE) for
6 DtoH buffers — ~25-30% faster transfers vs pageable memory.
NVRTC caching: 4 OnceLock additions in ml-ppo cuda_nn:
- softmax.rs: was re-compiling NVRTC on EVERY forward pass batch (!)
- linear.rs, lstm.rs: cached for multi-layer construction
Device attribute: OnceLock<u32> for max_threads in gpu_replay_buffer
pfx_sum — eliminates ~5µs driver query per call.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Activations: ml-ppo/cuda_nn/activations.rs 208→60 lines (-71%).
Deleted 4 inline CUDA kernels, replaced with thin wrappers delegating
to ml-core::cuda_autograd::ActivationKernels via new _raw methods.
AdamW: Unified kernel source between ml-ppo and ml-core. Switched to
architecture-aware SASS compilation (compile_ptx_for_device). Fixed
weight decay from L2-regularization to true decoupled AdamW formula.
Added GpuTensor::into_parts() for zero-copy CudaSlice extraction.
Added ActivationKernels::relu_fwd_raw/bwd_raw/tanh_fwd_raw/sigmoid_fwd_raw
for direct CudaSlice operation without GpuTensor wrapping.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace PolicyNetwork and ValueNetwork with CudaPolicyNetwork/CudaValueNetwork
backed implementations. Each struct now stores a cuda_nn GPU-native network
(cuBLAS sgemm + CUDA kernels) alongside shadow Candle layers for autograd
training compatibility. Adds forward_cuda() inference paths that bypass Candle
entirely. Wire CudaTrajectoryTensors into TrajectoryBatch with to_cuda_tensors().
Re-export CudaLSTM from lstm_networks and all cuda_nn types from crate root.
Import GpuContext into continuous_policy, continuous_action_masking, flow_policy,
coupling_layer, and adaptive_entropy for future GPU migration. Add CudaVec::to_tensor()
bridge for cuda_nn→Candle interop. Fix upload_host_to_gpu→upload_to_gpu rename
in ml-core cuda_autograd init.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Adds CudaTrajectoryTensors — GPU-resident trajectory batch storage that
replaces the Candle-based TrajectoryTensors. All trajectory data (states,
actions, log_probs, advantages, returns) uploaded as CudaSlice<f32> with
zero Candle tensor overhead.
The cuda_nn module is now complete with all primitives needed to replace
Candle in the PPO training loop:
- CudaLinear (cuBLAS sgemm)
- CudaLSTM (fused gate kernel)
- CudaPolicyNetwork / CudaValueNetwork (MLP stacks)
- CudaAdam (GPU-resident optimizer)
- CudaTrajectoryTensors (GPU batch storage)
- Softmax / log-softmax / ReLU / tanh / sigmoid kernels
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
GPU-native MLP networks that use CudaLinear layers + cuBLAS sgemm
internally. These are drop-in replacements for the Candle-based
PolicyNetwork and ValueNetwork, providing the same forward/softmax/
log_softmax API surface but with zero Candle overhead.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Introduces the cuda_nn module as the foundation for eliminating Candle from
the ml-ppo crate. All primitives store weights as CudaSlice<f32> and use
cuBLAS sgemm for matrix multiplication, custom CUDA kernels for activations.
Components:
- GpuContext: shared cuBLAS handle + CUDA stream wrapper
- CudaLinear: fully connected layer via cuBLAS sgemm + bias-add kernel
- CudaLSTM: fused gate LSTM cell via cuBLAS + gate nonlinearity kernel
- CudaAdam: GPU-resident Adam optimizer (m/v state on GPU, single kernel per step)
- cuda_softmax/cuda_log_softmax: warp-shuffle numerically stable kernels
- cuda_relu/cuda_tanh/cuda_sigmoid: element-wise activation kernels
- CudaVec: GPU buffer wrapper with known length
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
