All VRAM-derived parameters (batch_size, gpu_n_episodes, buffer_size)
are auto-scaled — CLI overrides bypass this and cause inconsistent
behavior between local testing and production.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
gpu_n_episodes was manually overridden in GPU profiles, training configs,
test files, and hyperopt — all set to 0 or small fixed values that
bypassed the auto-scaling logic, causing a div-by-zero crash in
train_baseline_rl.
Now: single auto-scaling path via optimal_n_episodes() from VRAM/SM
count. No manual override field. Cap at 16384 (consistent with
AutoBatchSizer's 8192 cap pattern). Floor at 32 for small GPUs.
Removed gpu_n_episodes from:
- DQNHyperparameters, PpoHyperparameters structs
- All 4 GPU profiles (rtx3050, h100, a100, default)
- Training profiles (smoketest, localdev)
- ExperienceProfile struct + serde
- Hyperopt adapter
- All test overrides
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
GPU monitoring download moved before log_epoch_end so the Epoch complete
line shows the current epoch's per-trade mean reward instead of 0.0.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Sparse trade-completion rewards (98% of bars = 0.0) made mean_reward
always ~0.0, hiding the actual learning signal. Now the GPU monitoring
kernel only accumulates non-zero rewards, giving meaningful per-trade
mean, std, sharpe, and trade count in the epoch summary log.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- Fix EMA kernel: add tau_buf device field, async HtoD via stable host
address, pass pointer not scalar (was ILLEGAL_ADDRESS every step)
- Fix HER relabel kernel: revert indirect ptr_buf to direct bf16 pointer
- Fix PER update kernel: revert indirect ptr_buf to direct u32/bf16 pointers
- Remove IQL per-step DtoH readback (cuStreamSynchronize blocks graph capture)
- Permanently disable cudarc event tracking (SyncOnDrop safe for capture)
- EventTrackingGuard no longer re-enables tracking on drop
- Pre-allocate pass1_event/pass3_event (no cuEventCreate per step)
- RawCudaGraph: raw CUDA driver API bypassing cudarc bind_to_thread
- graph_aux captures ~30 aux kernel launches (HER+clip+EMA+attn+IQL+IQN+CQL)
into single CUDA graph, replayed from step 3+ for zero launch overhead
- IQN/GpuDqnTrainer: tau_host stable field for graph-captured HtoD
- Remove 3 dead indirect pointer kernels from dqn_utility_kernels.cu
- Local RTX 3050: 7.5ms/step steady state (batch=64, 200 steps/epoch)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
ROOT CAUSE: GpuDqnTrainer uses double_dqn_stream for Double DQN
target-on-next forward pass. When capturing aux graphs (attention,
IQL, IQN) AFTER graph_forward replay, the captured graph has
dependencies on the double_dqn_stream work → STREAM_CAPTURE_ISOLATION.
The old separate graph_forward/graph_adam captured both streams
properly. The aux graph captures run AFTER replay and inherit
uncapturable cross-stream dependencies.
FIX NEEDED: mega-graph must be captured INSIDE GpuDqnTrainer's
capture_training_graphs where double_dqn_stream is accessible.
All aux ops must be part of the same capture scope.
This commit:
- Disabled cudarc event tracking permanently at FusedTrainingCtx init
- Removed all enable/disable/check_err from capture blocks
- Removed all EventTrackingGuard from gpu_dqn_trainer per-step methods
- Attention device_ptr → raw_ptr for DtoD + memset
- Raw cuStreamEndCapture fallback to prevent stream stuck in capture
- Error logging in attention capture to identify the failing op
- Removed PER update from graph_adam (cross-graph dependency)
- Removed indirect upload + spectral norm from graph_forward capture
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Vaccine:
- Replaced upload_batch_gpu (sync DtoD) with upload_batch_ptrs_6 +
submit_indirect_upload_ops (async indirect kernels). Zero sync.
- Deleted upload_batch_gpu entirely — no callers remain.
Causal intervention:
- Removed entirely from hot path. Was running 14 cuBLAS forward passes
every 100 steps with no readback and no training decision based on
the result. Pure GPU waste.
- Kernel still exists in cubin for future offline analysis.
Causal readback:
- Removed stream.synchronize() + memcpy_dtoh from run_causal_intervention.
Return value was already discarded by caller. Now returns 0.0 immediately.
Sensitivity stays on GPU.
Dead code:
- Deleted upload_batch_gpu (72 lines) — replaced by indirect upload.
Per-step hot path on step 2+:
9 graph replays (~45µs)
5 async HtoD (92 bytes, ~5µs)
Zero sync. Zero DtoH. Zero alloc. Zero CPU compute.
Zero concerns.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
IQN graph now captures the FULL pipeline in one graph:
- decode_actions + fwd/loss + backward + grad_norm + Adam
- trunk gradient (cuBLAS backward into shared weights)
- target EMA (tau from GPU-resident tau_buf, async HtoD before replay)
- IQN→PER loss DtoD copy
IQN EMA kernel changed: float tau → const float* tau_buf (device read).
tau_buf added to GpuIqnHead with async cuMemcpyHtoDAsync per step.
This was the last scalar parameter preventing full graph capture.
regime_scale_td_errors moved into graph_adam submit sequence.
Runs after Adam unflatten, before PER priority update.
Per-step: 7 graph replays + ~9 ungraphed ops
Ungraphed ops (genuinely can't be graphed — batch ptrs change):
- upload_batch_gpu: 6 DtoD + 2 pad_states (batch-specific pointers)
- HER relabel: 1-2 kernels (donor from batch next_states)
- PER priority update: 1 kernel (indices from batch)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
EMA:
- tau now uploaded via async cuMemcpyHtoDAsync_v2 to tau_buf
- EMA kernel reads tau from device buffer (const float* tau_buf)
- No scalar parameter that gets baked at graph capture time
Spectral norm:
- All 10 device_ptr() calls replaced with raw_ptr()
- Eliminates cudarc event recording on weight buffer access
- All parameters (sigma_max, dimensions) are config constants
Both operations are now fully graph-capture compatible:
- Stable buffer addresses
- No cudarc event recording
- No CPU scalar parameters that change between steps (except tau,
which is now GPU-resident)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Changed all 3 auxiliary Adam kernels to read adam_t from a device
buffer (const int* t_buf) instead of a scalar parameter. This is
required for CUDA Graph capture — scalar params get baked at capture
time and can't change between replays.
CUDA kernel changes:
- iqn_adam_kernel: int adam_t → const int* adam_t_buf
- iql_adam_kernel: int t → const int* t_buf
- attn_adam_kernel: int adam_t → const int* adam_t_buf
Rust changes:
- GpuIqnHead: added t_buf CudaSlice<i32>, async cuMemcpyHtoDAsync
- GpuIqlTrainer: added t_buf CudaSlice<i32>, async cuMemcpyHtoDAsync
- GpuAttention: added t_buf CudaSlice<i32>, async cuMemcpyHtoDAsync
- GpuAttention::adam_step: replaced device_ptr() with raw_ptr()
(eliminates cudarc event recording)
All auxiliary heads are now fully graph-capture compatible:
- Zero CPU scalar parameters that change between steps
- Zero cudarc device_ptr() calls (no event recording)
- All buffer addresses stable (pre-allocated in constructors)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Added her_sample_random_donors kernel to her_episode_kernel.cu.
Uses the existing per-sample LCG RNG state (already allocated in
GpuHer constructor, already used by Future strategy).
The per-step training hot path now has:
- Zero memcpy_htod (was 1 for HER random donors)
- Zero memcpy_dtoh
- Zero Vec/alloc
- Zero .clone()
- Zero cuStreamSynchronize
- Zero format!/String
Every CPU→GPU and GPU→CPU transfer has been eliminated.
The only remaining sync is the 1-step-lagged async readback
event check in replay_adam_and_readback (non-blocking in practice).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
HER relabeling now uses a dedicated CUDA kernel (her_inplace_relabel)
that writes goal columns + rewards directly into the trainer's padded
staging buffers. Zero intermediate GpuBatch allocation.
Kernel: her_inplace_relabel in dqn_utility_kernels.cu
- One warp (32 threads) per relabeled sample
- Coalesced column writes for goal_dim columns
- Sets rewards = 1.0 for HER samples
- Works for any goal_dim (1..state_dim)
Added to GpuDqnTrainer as 27th utility kernel.
launch_her_inplace_relabel() method takes raw pointers — zero cudarc
event recording overhead.
Deleted 6 test files that tested the removed CPU training path:
- dqn_checkpoint_loading_test.rs
- ensemble_real_models_validation_test.rs
- dqn_iqn_integration_test.rs
- validation_real_data_test.rs
- dqn_training_smoke_test.rs
- validation_harness_integration_test.rs
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
EMA (target_ema_update): removed cuStreamSynchronize + check_err.
EventTrackingGuard alone disables cudarc event recording.
Stream ordering guarantees graph replay completed before EMA.
First call still syncs for initial flatten_target_weights.
Attention (apply_attention_forward): removed cuStreamSynchronize
+ check_err. EventTrackingGuard sufficient. Stream ordering
guarantees save_h_s2 is written before attention reads it.
Root cause of previous hangs was the sync memcpy_htod for
adam_step (fixed in previous commit with cuMemcpyHtoDAsync_v2),
not these syncs. With async adam_step, the EventTrackingGuard
alone prevents stale cudarc events without pipeline drain.
Per-step hot path now has ZERO cuStreamSynchronize calls.
Only remaining sync: 1-step-lagged readback event.synchronize()
which fires only if previous async DtoH hasn't completed (~never).
Expected: 129ms/step → ~10-15ms/step (GPU compute only).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The batch_size >128 hang was caused by cudarc's synchronous
memcpy_htod for the adam_step counter. At batch_size=128 the
sync completes fast enough, but at 509+ the pipeline drain
from the sync interacts with CUDA Graph replay timing and
deadlocks the stream.
Replaced all 3 memcpy_htod(&[self.adam_step]) calls with raw
cuMemcpyHtoDAsync_v2 — zero pipeline drain, zero CPU sync.
Production TOML set to batch_size=0 (AutoBatchSizer drives it).
AutoBatchSizer caps at 8192 for RL training.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
batch_size=509 (from VRAM floor) and batch_size=1024 (from TOML)
both hang the training loop after CUDA graph capture. Only
batch_size=128 is known to work. Root cause unknown — likely a
cudarc or CUDA Graph limitation with larger buffer sizes.
Removed the VRAM floor that scaled 128→509. Production TOML
set to batch_size=128 (known working). The batch_size hang
investigation is part of the mega-graph refactor plan.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
batch_size=1024 has never been tested on H100. It was always
overridden by the CLI default (128) in all previous runs.
Our changes exposed this latent bug by conditional batch_size
override logic.
Root cause of the hang is unknown (likely CUDA Graph capture
with batch_size=1024 buffers). Setting to known-working 128
while we investigate. The batch_size=1024 hang investigation
is tracked in the mega-graph refactor plan.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
cudarc's EventTrackingGuard + check_err alone is NOT sufficient.
The cuStreamSynchronize is required every step because cudarc's
internal event state machine becomes corrupted without it —
training hangs indefinitely after graph capture.
This is a cudarc limitation: CUDA Graph replay generates stale
events that accumulate and eventually block kernel launches.
The sync drains the pipeline (~150µs) but prevents the hang.
Removing these syncs requires either:
1. Patching cudarc to not record events on graph-replayed buffers
2. Using raw CUDA driver API without cudarc's event tracking
3. The mega-graph refactor (all ops in one graph, no cudarc ops between)
The other perf wins (vaccine throttle, actions DtoD, HER GPU-native,
causal interval) remain active. Expected epoch: ~500s (vs 614s baseline).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The hang was caused by cudarc accumulating stale CudaEvent errors
from CUDA Graph replays. EventTrackingGuard + check_err must run
every step to drain these errors. The cuStreamSynchronize is only
needed on the very first call to clear the initial backlog from
graph capture — subsequent steps rely on stream ordering.
Guard (~100ns) + check_err (~50ns) per step is negligible.
The cuStreamSynchronize (~150µs pipeline drain) is eliminated
on all but the first step.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The full cuStreamSynchronize removal hung the training loop because
cudarc's EventTrackingGuard + check_err need one initial sync to clear
stale events from CUDA Graph capture. After the first call, stream
ordering is sufficient.
- target_ema_update: sync on first call only (target_params_initialized)
- apply_attention_forward: sync on first call only (attention_initialized)
- All subsequent steps: zero sync, pure async kernel dispatch
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
HER donor indices: removed memcpy_dtoh (was ~200B per step).
gpu_her_relabel_batch_with_donors now accepts CudaSlice<i32>
directly — gather kernel reads GPU-resident donor indices.
Reinterpret i32→u32 via pointer cast (safe for non-negative).
HER source indices: pre-computed once at init on GPU.
relabel_batch_with_strategy now accepts CudaSlice<i32>
instead of &[i32] — DtoD copy replaces per-step HtoD upload.
HER reward ones: pre-allocated CudaSlice<f32> at init.
Both Random and Future/Final HER paths use DtoD copy from
pre-allocated buffer instead of per-step vec![1.0; N] + HtoD.
Result: fused_training.rs now has ZERO memcpy_dtoh calls.
The only remaining GPU→CPU transfer in the entire training step
is the 1-step-lagged async loss/grad_norm readback via CUDA event
(non-blocking, overlapped with next step's compute).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Remove 3 per-step CPU-GPU synchronization points that dominated the
300ms/step wall time (pure compute for 323K params is <1ms on H100):
1. target_ema_update: removed cuStreamSynchronize — stream ordering
guarantees EMA kernel sees Adam-updated weights (same stream).
2. apply_attention_forward: removed cuStreamSynchronize — save_h_s2
is written by graph_forward on the same stream.
3. Actions DtoH round-trip: GpuBatch.actions changed from GpuTensor
(bf16) to CudaSlice<i32>. Eliminates synchronous GPU→CPU→GPU
round-trip (bf16 download → i32 cast → upload) every training step.
Actions now flow u32 → i32 via async DtoD in the replay buffer.
Throttle expensive per-step features:
4. Gradient vaccine: runs every 10 steps (was every step). Full
ungraphed forward+backward pass was ~100-150ms — the single
largest bottleneck. 10-step amortization preserves gradient
quality with ~90% cost reduction.
5. Causal intervention interval: 10 → 100. Each invocation runs
14 cuBLAS forward passes + sync + readback.
Dead code removed:
- u32_slice_to_gpu_tensor_gpu (56 lines) — obsolete bf16 cast path
- u32_to_f32 CastKernel field — no longer needed
- Old train_step fallback in training_loop — fused path only
Expected: ~300ms/step → ~25ms/step → ~50s/epoch (was 614s)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Sharpe calculation:
- Use per-trade returns (sum_returns/sum_sq_returns) instead of per-bar
step_returns. Per-bar Sharpe collapsed variance → bogus 19.75 with PF=0.03.
- Annualize by sqrt(trades_per_year) not sqrt(bars_per_year).
Batch sizing:
- Cap auto-computed batch_size at 8192 (VRAM ceiling of 2M is OOM limit, not
optimal RL batch).
- Add VRAM floor: batch_size < ceiling/4096 gets scaled UP (128 → 512 on H100).
- Only let hyperopt override batch_size when explicitly non-zero — preserve
profile's batch_size=0 auto-compute sentinel.
Replay buffer:
- Divide per_max_memory_bytes by 3.0 for regime heads (PER budget was 3x too
large, causing OOM cascade 74M → 37M → 18M → 9M → 4.6M).
- HER buffer uses original_buffer_size (pre-autosizer), not inflated 74M.
Q-value clipping:
- Wire hyperparams.q_clip_min/max to DQNConfig (was hardcoded ±500, production
TOML has ±50). Prevents Q-value overestimation ratio of 94.6x at epoch 2.
Training stability:
- Anti-LR warmup: skip first 5 epochs (early Sharpe unreliable from random
policy). Prevents bogus 3x LR boost at epoch 2.
- min_replay_size from profile (1000), not hyperopt batch_size (128).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Deleted the hardcoded 20% fallback function. Constructor now uses
vram_fraction directly for initial PER budget. No hardcoded limits
anywhere in the sizing pipeline.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Removed MAX_REPLAY_CAPACITY = 10M and STATIC_MAX_BATCH_SIZE = 8192.
Removed MIN_REPLAY_CAPACITY = 100K (replaced with 1024 segment tree minimum).
AutoBatchSizer computes from actual free VRAM. Replay buffer uses
vram_fraction (0.70 for H100) instead of hardcoded 20%.
H100 80GB: batch ~2M ceiling, replay ~89M entries (was capped at 10M).
RTX 3050 4GB: still auto-scales to small values safely.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Change PREFETCH_K from 32 to usize::MAX so the chunked
step_by loop iterates exactly once, acquiring the read lock
a single time per epoch instead of every 32 steps.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace host-side `current_t` scalar parameter in experience_env_step
with a GPU-resident counter buffer. The kernel now reads the timestep
index from device memory (step_counter_gpu[0]) instead of receiving it
as a kernel argument that changes every iteration. A tiny single-thread
step_counter_advance kernel increments the counter after each env_step.
This eliminates per-timestep host→GPU parameter variation in the 100-
iteration experience collection loop, making all iterations dispatch
identical kernel argument sets — a prerequisite for future CUDA Graph
capture of the timestep sequence.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Pass 2 (target forward) and Pass 3 (Double DQN online forward)
run concurrently on main stream + forked double_dqn_stream.
Fork/join via CUDA events captured in graph topology.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Fork 3 CUDA streams at CublasForward construction. In forward_online_raw
and forward_online_f32, the trunk records an event, each branch stream
waits on it, submits its GEMM+bias ops on its own stream (via
cublasSetStream), then the main stream joins all three. This overlaps
the 3 independent advantage head computations (exposure, order, urgency)
that previously executed sequentially.
Safety: a distinct_branches guard checks h_b0!=h_b1!=h_b2 at runtime;
callers that alias branch hidden buffers (Pass 3 Double DQN scratch
reuse) fall back to the sequential loop. CUDA Graph capture (CUDA 12+)
captures the fork/join pattern as graph dependencies.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace stream.synchronize() between experience collection and training
with a CUDA event recorded on the forked stream. The event is checked
lazily at the start of run_training_steps, allowing CPU-side setup
(can_train, ensure_fused_ctx, guard init, variable capture) to overlap
with the tail of GPU experience collection kernels.
Also converts the curiosity kernel sync to the event pattern with
non-blocking is_complete() poll before synchronize().
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Set batch_size=0 in config/gpu/h100.toml as sentinel for auto-compute.
The constructor now treats batch_size==0 as "let AutoBatchSizer drive":
it uses the VRAM-computed ceiling capped at 8192, instead of the static
1024 that was wasting >90% of H100's 80GB VRAM bandwidth.
Previously AutoBatchSizer computed the optimal batch (e.g. 2085808) but
the profile's batch_size=1024 always won. Now with batch_size=0 the
sizer's result flows through, enabling full SM occupancy on H100.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace synchronous memcpy_dtoh in reduce_current_q_stats() with
cuMemcpyDtoHAsync_v2 + CudaEvent pattern. The function now returns the
PREVIOUS call's results (one-step delay) while the current reduction
runs asynchronously, eliminating a GPU stall every 50 training steps.
Adds flush_q_stats_readback() to drain the final in-flight readback at
epoch end, matching the existing flush_readback() pattern for loss/grad_norm.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace the blocking stream.synchronize() in replay_adam_and_readback()
with async DtoH copies + CUDA event recording. Each step now returns
the previous step's scalars while the current step's readback lands
asynchronously. A flush_readback() call at epoch end collects the
final in-flight transfer. This eliminates 341 per-epoch CPU stalls
where the H100 sat idle waiting for Rust to re-enter the loop.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
precompute passes data-dir/SYMBOL to match how train_baseline_rl
calls load_all_bars(data_dir, symbol). compile-and-train gets
FOXHUNT_FEATURE_CACHE_DIR env var and --epochs fix.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Reuses compile-training, gpu-warmup, fetch-binary templates from
compile-and-train. Own train step runs train_baseline_rl directly
with --epochs, FOXHUNT_FEATURE_CACHE_DIR, and fxcache validation.
No hyperopt — pure baseline with default params.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- DAG: compile (ci-compile-cpu) + gpu-warmup → train (H100)
- Compiles from source targeting compute cap 90
- fxcache REQUIRED — fails if no .fxcache found
- Error chains printed with {:#} for full cause visibility
- Uses cargo-target-pvc for compile cache + sccache
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Dedicated workflow for baseline RL training without hyperopt.
Runs train_baseline_rl binary on GPU node with fxcache.
Fetches pre-compiled binary from MinIO, falls back to PVC.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Each record now starts with an i64 timestamp (nanoseconds since epoch)
before the feature/target/OFI data. v1 records grow from 432 to 440
bytes, v2 from 112 to 120 bytes. The timestamp is always i64 even in
bf16 mode. train_baseline_rl reconstructs bars with real timestamps
instead of placeholders so the walk-forward windower can split by month.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
