Remove entire trading_engine/src/compliance/ directory (9 files, 16,068 LOC) and 18 associated test files (18,069 LOC). Comprehensive audit confirmed zero external callers for all types (ISO 27001, SOX, MiFID II, best execution, automated reporting). Remove unused cron dependency. Independent compliance modules in risk/ and risk-data/ are preserved. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
367 lines
15 KiB
Rust
367 lines
15 KiB
Rust
#![deny(clippy::unwrap_used, clippy::expect_used)]
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#![cfg_attr(test, allow(clippy::unwrap_used, clippy::expect_used))]
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#![allow(unsafe_code)] // Intentional unsafe throughout trading_engine for HFT performance
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#![allow(missing_docs)] // Internal implementation details don't require documentation
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#![allow(missing_debug_implementations)] // Not all types need Debug
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#![allow(unused_crate_dependencies)] // Test dependencies only used in tests
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//! Core Performance Infrastructure for Foxhunt HFT System
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//!
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//! This module contains the high-performance building blocks that achieve sub-50μs latency:
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//! - **Types**: Core data types with optimized memory layout and financial safety
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//! - **Timing**: RDTSC-based ultra-low latency timing (14ns precision)
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//! - **SIMD**: Vectorized operations for numerical computing (AVX2/AVX512)
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//! - **Affinity**: CPU core binding for consistent performance
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//! - **Lockfree**: Lock-free data structures for concurrent access
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//!
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//! # Features
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//! - `simd`: Enable SIMD vectorization (default)
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//! - `avx2`: Enable AVX2 instructions
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//! - `avx512`: Enable AVX512 instructions
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//! - `packed-simd`: Enable `packed_simd` crate for advanced vectorization
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//! - `database-conversions`: Enable database type conversions
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//!
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//! # Usage
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//! ```rust
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//! use trading_engine::prelude::*;
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//! use std::arch;
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//!
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//! // High-performance types
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//! let price = Price::from_str("100.50")?;
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//! let quantity = Quantity::from_str("1000")?;
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//!
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//! // Ultra-low latency timing
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//! let timestamp = HardwareTimestamp::now();
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//!
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//! // SIMD operations (if CPU supports)
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//! #[cfg(target_arch = "x86_64")]
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//! if arch::is_x86_feature_detected!("avx2") {
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//! let simd_ops = SimdPriceOps::new()?;
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//! // Use vectorized operations
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//! }
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//! ```
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#![warn(missing_debug_implementations)]
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#![warn(rust_2018_idioms)]
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#![deny(
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clippy::unwrap_used,
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clippy::expect_used,
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clippy::panic,
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clippy::unimplemented,
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clippy::unreachable
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)]
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#![warn(clippy::perf, clippy::correctness)]
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// Individual pedantic lints are managed at workspace level in Cargo.toml
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#![allow(
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// Performance-critical allowances for HFT (sub-50μs latency requirements)
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clippy::similar_names,
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clippy::module_name_repetitions,
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clippy::too_many_lines,
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clippy::cast_possible_truncation,
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clippy::cast_precision_loss,
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clippy::cast_sign_loss,
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clippy::cast_possible_wrap,
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clippy::arithmetic_side_effects,
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clippy::float_arithmetic,
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clippy::integer_division,
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clippy::indexing_slicing, // Safe with bounds checks in hot paths
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clippy::as_conversions, // Necessary for u64<->i64 timestamp conversions
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clippy::default_numeric_fallback, // Type inference is clear in context
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clippy::type_complexity, // Some complex types unavoidable for performance
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clippy::missing_errors_doc, // Internal APIs don't need full error documentation
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clippy::struct_excessive_bools, // Boolean flags efficient for HFT state
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clippy::too_many_arguments, // Some functions need many parameters for performance
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clippy::cast_lossless, // as casts are intentional for HFT performance
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clippy::inline_always, // Explicit #[inline(always)] is performance-critical
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clippy::multiple_unsafe_ops_per_block, // RDTSC requires multiple unsafe ops
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clippy::option_if_let_else, // Match is often more readable in hot paths
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clippy::doc_markdown, // Internal code doesn't need strict doc formatting
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clippy::unsafe_derive_deserialize, // Hardware timestamp needs unsafe + serde
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clippy::match_same_arms, // Explicit match arms preferred for clarity
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clippy::shadow_reuse, // Variable reuse is intentional in hot paths
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clippy::shadow_unrelated, // Shadow patterns are intentional
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clippy::clone_on_ref_ptr, // Arc::clone is intentional for shared state
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clippy::modulo_arithmetic, // Modulo is used safely for financial calculations
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clippy::map_err_ignore, // Error conversion doesn't need original context
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clippy::manual_range_contains, // Explicit conditions clearer in some cases
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clippy::manual_let_else, // if-let pattern preferred for error handling
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clippy::missing_const_for_fn, // Const fn not critical for performance
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clippy::str_to_string, // Fixed: use .to_owned() instead
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clippy::unnecessary_wraps, // Result/Option wrapping needed for trait consistency
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clippy::new_without_default, // Many types need config params, Default is inappropriate
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clippy::needless_range_loop, // Index-based loops often clearer in hot paths
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clippy::unused_async, // Async needed for trait implementations
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clippy::must_use_candidate, // Not all functions need must_use
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clippy::unused_self, // Self parameter needed for trait consistency
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clippy::used_underscore_binding, // Underscore bindings used for partial pattern matches
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clippy::redundant_else, // Explicit else branches preferred for clarity
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clippy::unreadable_literal, // Large numbers are clear in financial context
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clippy::wildcard_enum_match_arm, // Exhaustive matching not required for all enums
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clippy::empty_structs_with_brackets, // Unit structs with brackets in generated/legacy code
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clippy::doc_lazy_continuation, // Doc comment formatting in generated code
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clippy::io_other_error, // io::Error construction patterns
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clippy::derivable_impls, // Manual Default impls for clarity
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clippy::single_match_else, // Explicit match arms preferred for clarity
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clippy::should_implement_trait, // Custom method names preferred over std traits
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clippy::uninlined_format_args, // Format args style is consistent across codebase
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clippy::clone_on_copy, // Explicit clones for clarity in hot paths
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clippy::undocumented_unsafe_blocks, // Unsafe blocks are intentional for HFT performance
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clippy::missing_safety_doc, // Unsafe is intentional for HFT performance
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clippy::assign_op_pattern, // Explicit assignment preferred for clarity
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clippy::get_first, // .get(0) used for consistency with other indices
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clippy::manual_contains, // Explicit iteration preferred in some cases
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clippy::missing_fields_in_debug, // Not all fields need Debug display
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clippy::if_not_else, // Negative conditions sometimes clearer in context
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clippy::write_with_newline, // Explicit newline writes for formatting control
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clippy::manual_clamp, // Explicit min/max chains for clarity
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clippy::len_without_is_empty, // len() without is_empty() in performance types
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clippy::manual_flatten, // Explicit if-let preferred in iterator processing
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clippy::inherent_to_string, // Custom to_string for display types
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clippy::if_same_then_else, // Intentional identical branches for future divergence
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clippy::vec_init_then_push, // Vec construction patterns in reporting code
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clippy::to_string_trait_impl, // Direct ToString impls for protocol types
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clippy::declare_interior_mutable_const, // Interior mutability needed for metric constants
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clippy::incompatible_msrv, // MSRV compatibility managed at workspace level
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clippy::cognitive_complexity // Complex HFT state machines and compliance code
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)]
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// SIMD features are detected at runtime instead of using unstable features
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// Unused crate dependencies (used in features or other contexts)
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extern crate chacha20poly1305 as _;
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#[allow(unused_extern_crates)]
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extern crate dashmap as _;
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extern crate log as _;
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extern crate zeroize as _;
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/// Core trading types with optimized memory layout and financial safety
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pub mod types;
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/// RDTSC-based ultra-low latency timing (14ns precision)
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pub mod timing;
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/// `SIMD` vectorized operations for numerical computing
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#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))]
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pub mod simd;
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// Re-export commonly used SIMD types for convenience
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#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))]
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pub use simd::{
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AlignedPrices, AlignedVolumes, CpuFeatures, SafeSimdDispatcher, SimdLevel, SimdMarketDataOps,
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SimdPriceOps, SimdRiskEngine,
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};
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#[cfg(feature = "wide")]
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extern crate wide as _;
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/// `CPU` core binding and real-time scheduling
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#[cfg(target_os = "linux")]
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pub mod affinity;
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/// Lock-free data structures for concurrent access
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pub mod lockfree;
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/// Small batch optimization for `HFT` performance
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pub mod small_batch_optimizer;
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/// High-performance event processing pipeline
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pub mod events;
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/// Configuration management system
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// Configuration is provided by the config crate
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/// Persistence layer with PostgreSQL, `InfluxDB`, Redis, and `ClickHouse`
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pub mod persistence;
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/// Prelude module for convenient imports
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pub mod prelude;
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/// Repository pattern abstractions for data access
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pub mod repositories;
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/// Core trading operations with comprehensive metrics
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pub mod trading_operations;
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// Dead code cleanup (Wave D Phase 6): Removed trading_operations_optimized.rs (662 lines),
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// simd_order_processor.rs (599 lines), hft_performance_benchmark.rs (565 lines) - orphaned benchmark files
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// Keep only working core trading_operations module
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/// Core trading engine and business logic
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pub mod trading;
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/// Broker connectivity and routing
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pub mod brokers;
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/// Unified feature extraction system - prevents training/serving skew
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pub mod features;
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/// Comprehensive performance benchmarks for `HFT` system validation
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#[cfg(feature = "benchmarks")]
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pub mod comprehensive_performance_benchmarks;
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/// Ultra-low latency metrics collection for `HFT` monitoring
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pub mod metrics;
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/// Distributed tracing with minimal performance impact
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pub mod tracing;
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/// Advanced memory allocation and access pattern benchmarks
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#[cfg(feature = "benchmarks")]
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pub mod advanced_memory_benchmarks;
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/// Performance test runner for executing all benchmark suites
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#[cfg(feature = "benchmarks")]
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pub mod test_runner;
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/// Test modules for validation
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pub mod tests;
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/// Storage backends including S3 archival for cold storage
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#[cfg(feature = "s3-archival")]
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pub mod storage;
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/// Performance utilities and constants
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pub mod performance {
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/// Target maximum latency for critical path operations (microseconds)
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pub const MAX_CRITICAL_LATENCY_US: u64 = 50;
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/// Target maximum latency for timing operations (nanoseconds)
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pub const MAX_TIMING_LATENCY_NS: u64 = 14;
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/// `SIMD` alignment requirement for optimal performance
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pub const SIMD_ALIGNMENT: usize = 32; // AVX2 alignment
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/// Cache line size for optimal memory layout
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pub const CACHE_LINE_SIZE: usize = 64;
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/// Check if current `CPU` supports required `SIMD` features
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///
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/// This function detects `AVX2` support which is the baseline `SIMD` requirement
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/// for high-performance trading operations. `AVX2` provides 256-bit vector
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/// operations that can process 8 single-precision floats or 4 double-precision
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/// floats simultaneously.
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///
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/// # Returns
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///
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/// `true` if `AVX2` is supported, `false` otherwise
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///
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/// # Examples
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///
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/// ```rust
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/// use trading_engine::performance::check_simd_support;
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///
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/// if check_simd_support() {
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/// println!("AVX2 vectorization available");
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/// } else {
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/// println!("Falling back to scalar operations");
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/// }
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/// ```
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///
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/// # Performance
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///
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/// This function has O(1) time complexity and minimal overhead as it's
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/// a simple `CPU` feature detection.
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#[cfg(target_arch = "x86_64")]
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pub fn check_simd_support() -> bool {
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use std::arch;
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arch::is_x86_feature_detected!("avx2")
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}
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/// Check if current `CPU` supports AVX-512
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///
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/// AVX-512 provides 512-bit vector operations that can process 16 single-precision
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/// floats or 8 double-precision floats simultaneously. This is available on
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/// high-end Intel processors (Skylake-X and later) and some Xeon processors.
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///
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/// # Returns
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///
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/// `true` if AVX-512F (foundation) is supported, `false` otherwise
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///
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/// # Examples
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///
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/// ```rust
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/// use trading_engine::performance::check_avx512_support;
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///
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/// if check_avx512_support() {
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/// println!("AVX-512 ultra-wide vectorization available");
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/// } else {
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/// println!("Using AVX2 or scalar operations");
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/// }
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/// ```
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///
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/// # Performance
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///
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/// This function has O(1) time complexity. Note that AVX-512 operations
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/// may cause `CPU` frequency scaling on some processors.
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#[cfg(target_arch = "x86_64")]
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pub fn check_avx512_support() -> bool {
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use std::arch;
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arch::is_x86_feature_detected!("avx512f")
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}
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/// Get optimal number of worker threads for current `CPU`
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///
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/// Calculates the optimal number of worker threads for `HFT` operations by
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/// reserving 2 `CPU` cores for the main trading thread and system processes.
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/// This helps avoid `CPU` contention and ensures consistent latency.
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///
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/// # Returns
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///
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/// Number of optimal worker threads (minimum 1, typically `CPU` cores - 2)
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///
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/// # Examples
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///
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/// ```rust
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/// use trading_engine::performance::optimal_worker_threads;
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///
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/// let workers = optimal_worker_threads();
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/// println!("Using {} worker threads for parallel processing", workers);
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/// ```
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///
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/// # Architecture Considerations
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///
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/// - On 8-core systems: returns 6 worker threads
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/// - On 4-core systems: returns 2 worker threads
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/// - On 2-core systems: returns 1 worker thread (minimum)
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///
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/// # Performance
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///
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/// This function has O(1) time complexity and is safe to call frequently.
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pub fn optimal_worker_threads() -> usize {
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num_cpus::get().saturating_sub(2).max(1)
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}
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}
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/// Error types for core operations
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pub mod error {
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use thiserror::Error;
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/// Core operation errors
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#[derive(Debug, Error)]
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pub enum CoreError {
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/// `SIMD` feature not supported
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#[error("SIMD feature not supported: {feature}")]
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SimdNotSupported { feature: String },
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/// `CPU` affinity operation failed
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#[error("CPU affinity error: {reason}")]
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AffinityError { reason: String },
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/// Lock-free operation failed
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#[error("Lock-free operation failed: {operation}")]
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LockFreeError { operation: String },
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/// Timing operation failed
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#[error("Timing error: {reason}")]
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TimingError { reason: String },
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/// Memory alignment error
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#[error("Memory alignment error: required {required}, got {actual}")]
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AlignmentError { required: usize, actual: usize },
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}
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/// `Result` type for core operations
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pub type CoreResult<T> = Result<T, CoreError>;
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}
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// Re-export error types at crate level
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// REMOVED: All re-exports eliminated from trading_engine
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