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foxhunt/docs
jgrusewski 21f911151a feat(sp21): T2.2 Phase 3 — wire E1 q_correction → Bellman target offset (atomic)
Wires `EnrichmentResult::q_correction` (Phase 1.5+2's E1
clamp(-mean(predicted_q − pnl), ±10.0) from the per-trade tape) into
the training loss kernels' Bellman target computation. Both
mse_loss_batched and c51_loss_kernel::block_bellman_project_f apply
q_correction as additive shift on the Bellman target — blended
(1-α)·MSE + α·C51 sees identical Q-target shifts (symmetric
application per feedback_no_partial_refactor).

ISV slot allocation (per pearl_controller_anchors_isv_driven +
feedback_isv_for_adaptive_bounds — adaptive Q-target shift IS
adaptive bound, lives in ISV bus):
- New Q_CORRECTION_INDEX = 520 in cuda_pipeline::sp21_isv_slots
- ISV_TOTAL_DIM 520 → 521 (bus extension)
- Layout fingerprint adds SLOT_520_Q_CORRECTION
- New module registered in cuda_pipeline/mod.rs
- Compile-time test verifies SP21_SLOT_END <= ISV_TOTAL_DIM

Sign convention: q_correction is the additive correction (E1 already
negates the bias). predicted_q > pnl → q_correction < 0 → "lower
Q-targets". predicted_q < pnl → q_correction > 0 → "raise Q-targets".
Cold-start sentinel 0.0 (no trades yet) is no-op until first val
pass writes (per pearl_first_observation_bootstrap).

ABI surgery (minimal):
- mse_loss_batched: ONE new scalar arg (float q_correction) at end
- c51_loss_batched: ZERO new args (block_bellman_project_f already
  takes isv_signals; reads slot 520 from there)
- launch_mse_loss: reads ISV[520] host-side via existing
  read_isv_signal_at, passes scalar
- training_loop.rs (post-enrichment): writes result.q_correction
  to ISV[520] via existing write_isv_signal_at

Files changed:
- crates/ml/src/cuda_pipeline/sp21_isv_slots.rs (NEW): slot const +
  bounds-check tests
- crates/ml/src/cuda_pipeline/mod.rs: pub mod sp21_isv_slots
- crates/ml/src/cuda_pipeline/gpu_dqn_trainer.rs: ISV_TOTAL_DIM bump +
  fingerprint update + launch_mse_loss launcher arg
- crates/ml/src/cuda_pipeline/mse_loss_kernel.cu: q_correction arg +
  application to target_q
- crates/ml/src/cuda_pipeline/c51_loss_kernel.cu: read isv_signals[520]
  in block_bellman_project_f, add to t_z
- crates/ml/src/trainers/dqn/trainer/training_loop.rs: write_isv_signal_at(
  Q_CORRECTION_INDEX, result.q_correction) post-enrichment
- docs/dqn-wire-up-audit.md: 2026-05-11 audit entry

Verification:
- cargo check -p ml --tests --features cuda: 0 errors
- cargo test -p ml --lib sp21_isv_slots --features cuda: 2/2 (bus
  bounds + slot uniqueness)
- sp20_aggregate_inputs_test: 12/12
- sp20_phase1_4_wireup_test: 2/2
- sp20_emas_compute_test: 4/4
- sp20_controllers_compute_test: 7/7
- sp21_per_trade_predicted_q_test: 3/3
Total: 30 tests, 0 failures. Behavioral gate (q_correction → non-
zero ISV[520] → Q-target shift) is the upcoming smoke training run.

After this commit (T2.2 Phases 4-8):
- Phase 4: E4 per-branch LR scaling via per-group Adam
- Phase 5: E6 winner indices → PER priority bumps
- Phase 6: E7 hindsight → replay buffer injection
- Phase 7: E8 curriculum weights → segment sampling
- Phase 8: signal-drive remaining controller GAINS

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-10 22:32:07 +02:00
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