jgrusewski 2f782ab214 refactor(cuda_pipeline): promote MappedF32/I32Buffer to shared module ...

Moves MappedF32Buffer + MappedI32Buffer from distributional_q_tests.rs
local definitions to crates/ml/src/cuda_pipeline/mapped_pinned.rs so all
kernel test wrappers (Phase 0.F, upcoming MoE Phase 2 tests) share one
implementation.

Adds write_from_slice helper for direct host_ptr write (no memcpy)
per feedback_no_htod_htoh_only_mapped_pinned.md.

Test 0.F bit-identical post-move: sigma_C51, argmax, Thompson counts
unchanged.

Per spec docs/superpowers/specs/2026-04-27-moe-regime-redesign-design.md §6.4
and feedback_no_htod_htoh_only_mapped_pinned.md.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

2026-04-27 18:26:24 +02:00

..

infra

feat(infra): GPU training launcher with local/cloud routing

2026-02-23 11:19:58 +01:00

plans

feat(dqn): enable Branching DQN with 45 factored actions (5×3×3)

2026-03-11 22:00:13 +01:00

superpowers

spec+plan(moe): correct gate input dim 42 → STATE_DIM=128

2026-04-27 18:22:40 +02:00

dqn-gpu-hot-path-audit.md

feat(dqn): Plan 1 Task 9 — atoms_update GPU kernel + AtomsMonitor + delete CPU paths

2026-04-24 18:28:19 +02:00

dqn-named-dims.md

feat(dqn-v2): D.6 plan_isv[6] = remaining_fraction

2026-04-24 20:36:46 +02:00

dqn-wire-up-audit.md

refactor(cuda_pipeline): promote MappedF32/I32Buffer to shared module

2026-04-27 18:26:24 +02:00

h_s2_consumers_audit.md

audit(dqn-v2): h_s2 audit anchor corrections (post-2c.3+4 reconnaissance)

2026-04-25 12:29:47 +02:00

isv-slots.md

refactor(dqn-v2): delete legacy CPU-DtoH per_branch_vsn_mean / per_branch_target_drift

2026-04-25 11:02:23 +02:00

ml-supervised-to-dqn-concept-audit.md

plan4(task7): Part E audit close-out — every supervised concept landed or OUT

2026-04-26 10:36:03 +02:00