feat(dqn-v2): D.8 Plan 2 Task 6C — TLOB cuBLAS port, train+val parity
Implement TLOB attention (OFI[32]→TLOB[16]) using existing DQN cuBLAS
infrastructure. Random Xavier init, trained end-to-end via DQN reward.
Both training (experience_env_step) and val (backtest_plan_kernel) write
TLOB features to SL_TLOB_START=74, preserving state-dist parity.
State layout changes:
- SL_TLOB_DIM=16 inserted at SL_OFI_START+SL_OFI_DIM (=74)
- SL_MTF_START 74→90, SL_PORTFOLIO_START 90→106, SL_PLAN_ISV_START 98→114
- SL_PADDING_START 105→121, SL_STATE_DIM 112→128
- state_layout.rs mirrored: TLOB_START=74, STATE_DIM=128
New files:
- cuda_pipeline/gpu_tlob.rs: GpuTlob with 9 cublasLt GEMM descriptors,
forward/backward/adam_step, copy_params_from for val weight sync
- cuda_pipeline/tlob_kernel.cu: tlob_sdp_forward, tlob_sdp_backward,
tlob_write_states, tlob_read_grad_from_states kernels
Wiring:
- fused_training.rs: TLOB forward before trunk; TLOB backward+Adam Phase 6
- training_loop.rs: per-epoch ISV[60]=TLOB_REGIME_FOCUS_EMA update
- gpu_backtest_evaluator.rs: val TLOB forward after each launch_gather,
set_tlob_from_training syncs weights from training TLOB each epoch
- metrics.rs: creates eval GpuTlob on evaluator stream, syncs params
- gpu_dqn_trainer.rs: ISV_TOTAL_DIM 60→63, fingerprint indices 58/59→61/62
ISV slot audit: isv-slots.md updated (slot 60=TLOB_REGIME_FOCUS_EMA,
fingerprint shifted to 61/62, ISV_TOTAL_DIM=63).
Wire-up audit: dqn-wire-up-audit.md updated (gpu_tlob.rs + tlob_kernel.cu).
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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