Replace serial 3-thread kernel (each looping 524K iters) with 2-phase block-parallel reduction: Phase 1 uses shared memory block reduce across ceil(BQ/256) blocks per neuron; Phase 2 warp-reduces block partials. Preallocated scratch buffer [ceil(BQ/256), max_out_dim] avoids runtime alloc. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>