Wave 0 (NVTX Instrumentation): - Add ml-core::nvtx module with NvtxRange RAII guard (runtime dlopen, zero overhead when absent) - Instrument 10 CUDA pipeline hot paths: experience collector, backtest evaluator, PPO collector, statistics, training guard, monitoring, replay buffer Wave 1 (Low-Effort H100 Optimizations): - L2 cache persistence: pin DQN weights (~23MB BF16) in H100's 50MB L2 via cudaCtxSetLimit(CU_LIMIT_PERSISTING_L2_CACHE_SIZE) — 3.5x effective bandwidth - Dynamic shared memory: GPU-aware tile sizing (228KB H100, 164KB A100, 100KB RTX) via CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES opt-in - Async double buffer: sync_staging() with CUDA stream synchronization before swap Validation: 0 clippy errors, 1629 tests passed (308+410+911), 0 gpu-hotpath violations Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
286 lines
10 KiB
Rust
286 lines
10 KiB
Rust
#![allow(unsafe_code)] // Required for CUDA driver API calls (cuCtxSetLimit, cuDeviceGetAttribute)
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//! L2 cache persistence hints for H100/Hopper GPUs.
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//!
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//! Pins frequently-accessed GPU memory (model weights) in L2 cache
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//! for ~3.5x effective bandwidth improvement over HBM reads.
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//! No-op on non-Hopper GPUs or when L2 cache is too small.
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//!
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//! # How it works
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//!
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//! H100 SXM5 has 50 MB of L2 cache. DQN model weights are typically ~23 MB
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//! in BF16 -- they fit entirely in L2. Without persistence hints, frequently
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//! accessed weight data competes with transient data for L2 residency and
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//! may be evicted between kernel launches.
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//!
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//! `cuCtxSetLimit(CU_LIMIT_PERSISTING_L2_CACHE_SIZE, bytes)` tells the CUDA
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//! runtime to reserve up to `bytes` of L2 for persistent data. Combined with
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//! CUDA's access pattern tracking, this keeps model weights hot in L2 across
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//! successive forward passes.
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//!
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//! # Supported GPUs
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//!
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//! - **H100 (SXM5/PCIe)**: 50 MB L2 cache
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//! - **H200**: 50 MB L2 cache
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//! - **GH200**: 50+ MB L2 cache
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//! - Other GPUs: no-op (L2 too small or persistence not beneficial)
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/// Minimum L2 cache size (in bytes) for persistence to be worthwhile.
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///
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/// Below this threshold the L2 is too small to hold meaningful weight data
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/// alongside transient activations and the persistence hint would cause
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/// more harm than good (evicting activation data that could benefit from L2).
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const MIN_L2_FOR_PERSISTENCE_BYTES: usize = 40 * 1024 * 1024; // 40 MB
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/// Returns `true` if the GPU supports L2 cache persistence with a large
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/// enough L2 to benefit model weight pinning.
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///
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/// Currently returns `true` for Hopper-class GPUs (H100, H200, GH200)
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/// which have 50+ MB L2 cache. Ampere GPUs (A100: 40 MB L2) are excluded
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/// because their L2 is borderline after accounting for driver and
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/// activation overhead.
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pub fn supports_l2_persistence(gpu_name: &str) -> bool {
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let name = gpu_name.to_uppercase();
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// Hopper-class GPUs with 50+ MB L2
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name.contains("H100")
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|| name.contains("H200")
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|| name.contains("GH200")
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}
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/// Query the maximum persisting L2 cache size (in bytes) from the CUDA driver.
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///
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/// Returns `Ok(0)` if the GPU does not support L2 persistence.
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/// Returns `Err` if the CUDA driver call fails.
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#[cfg(feature = "cuda")]
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fn query_max_persisting_l2_bytes() -> Result<usize, String> {
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use candle_core::cuda_backend::cudarc::driver::sys::{
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CUdevice_attribute, CUresult,
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};
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// Query via the capabilities module -- it already has the device name cached.
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// But we also need the raw CUDA attribute for the exact L2 cache size.
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let caps = super::capabilities::cached_capabilities();
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if !caps.is_cuda {
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return Ok(0);
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}
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// Use nvidia-smi-detected device name to gate the feature.
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// Only proceed if the GPU actually supports persistence.
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if !supports_l2_persistence(&caps.device_name) {
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return Ok(0);
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}
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// Query the hardware limit via CUDA driver API.
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// CU_DEVICE_ATTRIBUTE_MAX_PERSISTING_L2_CACHE_SIZE returns bytes.
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let mut max_bytes: i32 = 0;
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let result = unsafe {
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candle_core::cuda_backend::cudarc::driver::sys::cuDeviceGetAttribute(
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&mut max_bytes,
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CUdevice_attribute::CU_DEVICE_ATTRIBUTE_MAX_PERSISTING_L2_CACHE_SIZE,
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0, // device ordinal 0
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)
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};
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if result != CUresult::CUDA_SUCCESS {
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return Err(format!(
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"cuDeviceGetAttribute(MAX_PERSISTING_L2_CACHE_SIZE) failed: {result:?}"
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));
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}
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Ok(max_bytes.max(0) as usize)
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}
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/// Set the persisting L2 cache size for the current CUDA context.
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///
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/// `num_bytes` is clamped to the hardware maximum. The CUDA driver will
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/// reserve up to this many bytes in L2 for persistent data, allowing
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/// frequently-accessed memory (model weights) to remain cache-resident
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/// across kernel launches.
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///
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/// Returns the actual number of bytes set (may be clamped by hardware).
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///
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/// # No-op conditions
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///
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/// Returns `Ok(0)` without calling the driver when:
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/// - No CUDA GPU is detected
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/// - The GPU does not support L2 persistence (non-Hopper)
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/// - The max persisting L2 size is below [`MIN_L2_FOR_PERSISTENCE_BYTES`]
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///
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/// # Errors
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///
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/// Returns `Err` if the CUDA driver call fails.
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#[cfg(feature = "cuda")]
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pub fn set_persisting_l2_cache_size(num_bytes: usize) -> Result<usize, String> {
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use candle_core::cuda_backend::cudarc::driver::sys::{
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cuCtxSetLimit, CUlimit, CUresult,
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};
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let max_bytes = query_max_persisting_l2_bytes()?;
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if max_bytes < MIN_L2_FOR_PERSISTENCE_BYTES {
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tracing::debug!(
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max_bytes,
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min_required = MIN_L2_FOR_PERSISTENCE_BYTES,
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"L2 cache persistence: GPU L2 too small or not supported, skipping"
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);
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return Ok(0);
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}
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// Clamp to hardware maximum.
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let target = num_bytes.min(max_bytes);
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let result = unsafe {
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cuCtxSetLimit(CUlimit::CU_LIMIT_PERSISTING_L2_CACHE_SIZE, target)
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};
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if result != CUresult::CUDA_SUCCESS {
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return Err(format!(
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"cuCtxSetLimit(PERSISTING_L2_CACHE_SIZE, {target}) failed: {result:?}"
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));
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}
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tracing::info!(
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target_bytes = target,
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max_hw_bytes = max_bytes,
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target_mb = target / (1024 * 1024),
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max_hw_mb = max_bytes / (1024 * 1024),
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"L2 cache persistence: reserved {} MB of {} MB max",
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target / (1024 * 1024),
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max_bytes / (1024 * 1024),
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);
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Ok(target)
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}
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/// CPU-only stub: always returns `Ok(0)`.
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#[cfg(not(feature = "cuda"))]
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pub fn set_persisting_l2_cache_size(_num_bytes: usize) -> Result<usize, String> {
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Ok(0)
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}
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/// Reset the persisting L2 cache, releasing all persistent cache lines.
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///
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/// Call this during shutdown or when switching between models of very
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/// different sizes to avoid stale persistence reservations.
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///
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/// No-op on non-CUDA builds or when L2 persistence is not supported.
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#[cfg(feature = "cuda")]
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pub fn reset_persisting_l2_cache() -> Result<(), String> {
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use candle_core::cuda_backend::cudarc::driver::sys::{
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cuCtxResetPersistingL2Cache, CUresult,
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};
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let result = unsafe { cuCtxResetPersistingL2Cache() };
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if result != CUresult::CUDA_SUCCESS {
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return Err(format!(
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"cuCtxResetPersistingL2Cache() failed: {result:?}"
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));
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}
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tracing::debug!("L2 cache persistence: reset all persistent cache lines");
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Ok(())
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}
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/// CPU-only stub: always returns `Ok(())`.
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#[cfg(not(feature = "cuda"))]
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pub fn reset_persisting_l2_cache() -> Result<(), String> {
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Ok(())
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}
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/// Convenience: configure L2 persistence for model weights if the GPU supports it.
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///
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/// Checks whether the detected GPU name supports L2 persistence (Hopper-class),
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/// and if so sets the persisting L2 cache size to accommodate `weight_bytes`.
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///
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/// Returns the number of bytes actually reserved (0 if not supported or not applicable).
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///
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/// This is the primary entry point for callers. Typical usage:
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/// ```ignore
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/// let reserved = pin_weights_in_l2("NVIDIA H100 80GB HBM3", 23_000_000)?;
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/// if reserved > 0 {
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/// tracing::info!("L2 pinning active: {} MB reserved", reserved / 1_048_576);
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/// }
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/// ```
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pub fn pin_weights_in_l2(gpu_name: &str, weight_bytes: usize) -> Result<usize, String> {
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if !supports_l2_persistence(gpu_name) {
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tracing::debug!(
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gpu = gpu_name,
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"L2 cache persistence: GPU not supported, skipping"
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);
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return Ok(0);
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}
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set_persisting_l2_cache_size(weight_bytes)
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}
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/// Convenience: unpin L2 cache (alias for [`reset_persisting_l2_cache`]).
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pub fn unpin_l2() -> Result<(), String> {
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reset_persisting_l2_cache()
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn test_supports_l2_persistence_hopper() {
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assert!(supports_l2_persistence("NVIDIA H100 80GB HBM3"));
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assert!(supports_l2_persistence("NVIDIA H100 SXM5"));
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assert!(supports_l2_persistence("NVIDIA H100 PCIe"));
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assert!(supports_l2_persistence("NVIDIA H200 141GB HBM3e"));
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assert!(supports_l2_persistence("NVIDIA GH200 Grace Hopper"));
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}
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#[test]
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fn test_supports_l2_persistence_non_hopper() {
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assert!(!supports_l2_persistence("NVIDIA A100-SXM4-80GB"));
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assert!(!supports_l2_persistence("NVIDIA L40S"));
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assert!(!supports_l2_persistence("NVIDIA GeForce RTX 4090"));
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assert!(!supports_l2_persistence("NVIDIA GeForce RTX 3050 Ti"));
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assert!(!supports_l2_persistence("Tesla V100"));
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assert!(!supports_l2_persistence("CPU"));
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assert!(!supports_l2_persistence(""));
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}
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#[test]
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fn test_supports_l2_persistence_case_insensitive() {
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assert!(supports_l2_persistence("nvidia h100"));
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assert!(supports_l2_persistence("h200 something"));
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assert!(supports_l2_persistence("gh200"));
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}
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#[test]
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fn test_pin_weights_non_hopper_is_noop() {
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let result = pin_weights_in_l2("NVIDIA A100-SXM4-80GB", 23_000_000);
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assert!(result.is_ok());
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assert_eq!(result.ok(), Some(0));
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}
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#[test]
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fn test_pin_weights_cpu_is_noop() {
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let result = pin_weights_in_l2("CPU", 23_000_000);
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assert!(result.is_ok());
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assert_eq!(result.ok(), Some(0));
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}
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#[test]
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fn test_unpin_l2_does_not_panic() {
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// On CPU builds or without CUDA context this should not panic.
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// It may return an error if there's no CUDA context, which is fine.
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let _ = unpin_l2();
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}
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#[test]
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fn test_set_persisting_l2_noop_on_cpu() {
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// Without a CUDA device, this should return 0 or an error gracefully.
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let result = set_persisting_l2_cache_size(50 * 1024 * 1024);
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// On CPU test machines this will either return Ok(0) or an error
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// about missing CUDA context -- both are acceptable.
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match result {
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Ok(0) => {} // Expected on CPU
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Err(_) => {} // Also acceptable -- CUDA driver not available
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Ok(n) => {
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// If we somehow have a GPU, the value should be reasonable
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assert!(n <= 50 * 1024 * 1024);
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}
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}
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}
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}
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