jgrusewski
789fb50dfe
perf(cuda): Wave 3 — TMA bulk async tile loads for Hopper (sm_90+)
Add cp.async.bulk.shared::cta.global tile loads guarded by
#if __CUDA_ARCH__ >= 900 in common_device_functions.cuh:
- cooperative_load_tile_tma(): thread-0-only bulk copy via inline PTX,
freeing 31 warp threads for compute overlap. 16KB chunks with
commit_group/wait_group barrier.
- cooperative_load_tile_float4(): renamed original for fallback.
- cooperative_load_tile(): dispatch wrapper (compile-time selection).
Architecture-aware NVRTC compilation (compile_ptx_for_device):
- Queries GPU compute capability, passes -arch=compute_XX to NVRTC.
- Enables __CUDA_ARCH__ in kernels so TMA guard activates on Hopper.
- Wired into all 3 runtime compilation sites (experience collector,
backtest evaluator, PPO collector).
Also fixes pre-existing clippy: vh * 1 identity op in weight estimate.
79 cuda_pipeline tests pass, 0 clippy errors.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-03-11 22:45:13 +01:00
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