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foxhunt/docs
jgrusewski a59e7599c8 plan(dqn-v2): Plan 3 revision — GPU-drives-CPU-reads, ISV tail-append, AdaptiveMonitor
Aligns Plan 3 with post-Plan-2 reality:

1. AdaptiveController → AdaptiveMonitor throughout (spec §4.C.6
   2026-04-24 revision). Tasks 4 (plan-threshold) and 9 (cql_alpha
   seed-coupled) become GPU kernel + read-only CPU monitor pairs
   instead of CPU-compute controllers — uniform with Plan 1's
   tau/epsilon/gamma/kelly_cap and Plan 2's per-branch γ pattern.

2. Stale ISV slot indices [49..65) replaced with tail-append language.
   Current post-Plan-2 ISV_TOTAL_DIM = 63; new slots start at 63 and
   grow. Fingerprint at 61-62 auto-re-tails.

3. Architecture paragraph updated to document replay-seed orchestration
   (Task 8 dqn_replay_seed.rs) as constructor-time cold-path pre-training
   — not a GPU-drives violation.

4. Prerequisites section clarified: Plan 2 state — ISV_TOTAL_DIM 63,
   TLOB at SL_TLOB_START, layout fingerprint auto-recomputes.

No scope changes to individual Tasks 1-10. Just terminology + slot
indexing aligned with current main state.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-04-24 21:46:38 +02:00
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