New separate producer kernel reading save_h_s2 [B × SH2] via
sp4_histogram_p99<256>. Output → ISV[169] via host-side Pearls A+D
applied at scratch slot 39. Mirrors Task A5's pattern exactly.
NB: distinct from existing h_s2_rms_ema_update (slot 96) which is a
different signal (RMS, not p99). Task A13 will retrofit that existing
kernel to also use Pearls A+D, in a separate commit.
GPU test verifies p99 ≈ 2.576 for 4096 |N(0,1)| samples within 5%
tolerance (rel_err = 0.336% on local RTX 3050 Ti) and exercises Pearl
A's sentinel branch (first observation replaces sentinel directly,
x_lag seeds to step_p99, both variances stay zero).
No consumer wired yet. Behaviour unchanged. cargo check --lib --tests clean.
6/6 SP4 producer GPU tests passing locally (A4 + A5 + A6 + A7 + A8 + A9).
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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