Per Class A audit P1 wiring batch — only 1 of 4 items was wireable as
spec'd. The other 3 are deferred per the spec's "DEFER not BLOCK" rule
because their target ISV slots either don't exist or are unit-incompatible
with the consumer site.
Items:
1. trade_physics.cuh:548 (DD floor_dd 0.25f) — DEFERRED. Slot 421
(DD_THRESHOLD_INDEX) holds the DD trigger threshold (~0.05), NOT the
penalty saturation floor (~0.25). Different parameters; substituting
would break the ramp formula `(dd-thr)/(floor-thr)`. Needs a new slot
for the saturation floor.
2. gpu_experience_collector.rs:343-344 (dd_threshold + w_dd config) —
DEFERRED. No W_DD slot exists in any sp*_isv_slots.rs. The legacy
compute_drawdown_penalty path (experience_kernels.cu:3769) uses
config scalars; the SP15 reward axis (compute_sp15_final_reward_kernel)
already reads slot 421 directly. Wiring needs a new W_DD slot.
3. plan_threshold_update_kernel.cu:44 (plan threshold floor) — DEFERRED.
Unit mismatch: ema and plan_threshold are probabilities ∈[0,1];
Q_DIR_ABS_REF (slot 21) is a Q-value magnitude EMA (5–50). Scaling
a probability by a Q-magnitude is dimensionally meaningless.
4. experience_kernels.cu:2471 (var_floor formula) — DONE. Drop the
hardcoded 0.25f lower bound. Was `fminf(fmaxf(q_gap*0.5f, 0.25f), 1.0f)`;
now `fminf(q_gap*0.5f, 1.0f)`. NULL-q_gaps fallback uses ε=1e-6f for
numerical safety (vs prior 0.25f). var_scale itself remains (0,1] from
`1/(1+sqrt(var_q))` so the multiplicative chain stays bounded.
Cumulative WR-plateau fix series:
- Class C bug 1 + P0-B (8f218cab2)
- P0-C (316db416b)
- P0-A (394de7d43)
- P1 wiring (this commit, partial — Items 1/2/3 deferred to producer batch)
Per feedback_isv_for_adaptive_bounds.md.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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