Replace 40 per-tensor f32_to_bf16_kernel launches per EMA step (20 online
+ 20 target) with 2 single-launch conversions over flat contiguous buffers.
- Add bf16_params_buf and bf16_target_params_buf (flat CudaSlice<u16>) that
mirror the GOFF_* layout of the F32 params_buf/target_params_buf
- Precompute bf16_goff_byte_offsets[20] at construction for zero-cost pointer
arithmetic into flat BF16 buffers during kernel launches
- sync_online_bf16: single f32_to_bf16_kernel(params_buf, bf16_params_buf, N)
- sync_target_bf16: single f32_to_bf16_kernel(target_params_buf, bf16_target_params_buf, N)
- Forward kernels pass raw u64 device pointers at GOFF offsets instead of
individual CudaSlice<u16> references — zero additional allocation
- Remove DuelingWeightSetBf16/BranchingWeightSetBf16 dependency from trainer
- Add flat target_params_buf for fused single-kernel EMA update
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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