feat(sp14): B.1 — sp14_isv_slots.rs with 13 new ISV slot constants
Allocates ISV slots [383..396) for the Aux→Q Wire + Earned Gradient Flow pearl (Layer B of SP14). Mirrors sp13_isv_slots.rs pattern. The plan originally documented [381..394), but Phase 0 verification found SP13 closeout added HOLD_RATE_TARGET_INDEX=381 and HOLD_RATE_OBSERVED_EMA_INDEX=382 after the plan was written, so the range shifts by +2. Slots fall into 4 functional groups: - Q-disagreement EMAs (short, long; K=4↔K=2 mapping with Hold/Flat masked) - Adaptive controllers (k_aux, k_q, β; variance-driven) - Welford variance EMAs (3, one per adaptive scalar) - Schmitt state + α_grad outputs + circuit breaker Plus 14 structural constants for numerical-stability anchors: K_BASE_*, K_MIN, VARIANCE_REF_*, BETA_BASE, BETA_MAX, SCHMITT_BAND, WARMUP_STEPS_FALLBACK, LOCKOUT_*, Q_DISAGREEMENT_BASELINE. Per feedback_isv_for_adaptive_bounds: adaptive bounds (k_*, β, post_open_min, lockout) live in ISV; numerical anchors live as structural constants. Per pearl_first_observation_bootstrap: all EMAs reset to sentinels and Pearl-A bootstraps on first observation. Producer + consumer wiring lands in subsequent tasks (B.2-B.12); this commit is additive infrastructure only — no behavior change. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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jgrusewski
@@ -62,6 +62,7 @@ pub mod sp4_isv_slots;
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pub mod sp5_isv_slots;
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pub mod sp11_isv_slots;
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pub mod sp13_isv_slots;
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pub mod sp14_isv_slots;
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pub use sp4_isv_slots::{
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TARGET_Q_BOUND_INDEX, ATOM_POS_BOUND_BASE, WEIGHT_BOUND_BASE,
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ADAM_M_BOUND_BASE, ADAM_V_BOUND_BASE, WD_RATE_BASE,
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99
crates/ml/src/cuda_pipeline/sp14_isv_slots.rs
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99
crates/ml/src/cuda_pipeline/sp14_isv_slots.rs
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@@ -0,0 +1,99 @@
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//! SP14 ISV slot constants.
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//!
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//! 13 slots for the Aux→Q Wire + Earned Gradient Flow pearl. See
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//! `docs/superpowers/specs/2026-05-05-sp14-aux-q-wire-earned-gradient-flow.md`
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//! for the full design rationale; in brief:
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//!
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//! - Q_DISAGREEMENT_*: K=4↔K=2 mapped per-step argmax mismatch (B.2.3)
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//! - K_*_ADAPTIVE: ISV-driven sigmoid steepness from Welford variance (B.2.5)
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//! - BETA_RATE_LIMITER_ADAPTIVE: ISV-driven rate-limiter β (B.2.8)
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//! - AUX_DIR_ACC_VARIANCE_EMA + Q_DISAGREEMENT_VARIANCE_EMA + ALPHA_GRAD_RAW_VARIANCE_EMA:
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//! Welford variance EMAs driving the three adaptive scalars
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//! - GATE1_OPEN_STATE: Schmitt-trigger persistent state (0=closed, 1=open)
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//! - ALPHA_GRAD_RAW: raw gate output (HEALTH_DIAG visibility)
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//! - ALPHA_GRAD_SMOOTHED: rate-limited gate consumed by backward path
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//! - AUX_DIR_ACC_POST_OPEN_MIN + GRADIENT_HACK_LOCKOUT_REMAINING: anti-gradient-hacking circuit breaker
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//!
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//! Slots [383..396) allocated here. SP13 ended at slot 382 (HOLD_RATE_OBSERVED_EMA_INDEX=382).
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//! The plan originally documented [381..394), but Phase 0 verification found SP13 closeout
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//! added HOLD_RATE_TARGET_INDEX=381 and HOLD_RATE_OBSERVED_EMA_INDEX=382 after the plan was
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//! written, so the range shifts by +2.
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//!
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//! Spec: docs/superpowers/specs/2026-05-05-sp14-aux-q-wire-earned-gradient-flow.md
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// Q-disagreement EMAs (K=4↔K=2 mapping with Hold/Flat masked)
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pub const Q_DISAGREEMENT_SHORT_EMA_INDEX: usize = 383;
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pub const Q_DISAGREEMENT_LONG_EMA_INDEX: usize = 384;
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// Adaptive sigmoid steepness (variance-driven)
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pub const K_AUX_ADAPTIVE_INDEX: usize = 385;
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pub const K_Q_ADAPTIVE_INDEX: usize = 386;
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// Adaptive rate-limiter β (variance-driven; B.2.8)
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pub const BETA_RATE_LIMITER_ADAPTIVE_INDEX: usize = 387;
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// Welford variance EMAs (drivers for adaptive k_aux, k_q, β)
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pub const AUX_DIR_ACC_VARIANCE_EMA_INDEX: usize = 388;
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pub const Q_DISAGREEMENT_VARIANCE_EMA_INDEX: usize = 389;
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pub const ALPHA_GRAD_RAW_VARIANCE_EMA_INDEX: usize = 390;
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// Schmitt-trigger persistent state (0=closed, 1=open)
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pub const GATE1_OPEN_STATE_INDEX: usize = 391;
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// α_grad outputs (raw + rate-limited)
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pub const ALPHA_GRAD_RAW_INDEX: usize = 392;
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pub const ALPHA_GRAD_SMOOTHED_INDEX: usize = 393;
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// Anti-gradient-hacking circuit breaker
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pub const AUX_DIR_ACC_POST_OPEN_MIN_INDEX: usize = 394;
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pub const GRADIENT_HACK_LOCKOUT_REMAINING_INDEX: usize = 395;
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// ── Sentinels (initial values; reset at fold boundary) ─────────────────────
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pub const SENTINEL_Q_DISAGREEMENT: f32 = 0.5; // analytic K=4↔K=2 random alignment
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pub const SENTINEL_VARIANCE: f32 = 0.0; // → initial k = k_base, β = β_base
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pub const SENTINEL_GATE1_CLOSED: f32 = 0.0;
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pub const SENTINEL_ALPHA_GRAD: f32 = 0.0;
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pub const SENTINEL_POST_OPEN_MIN: f32 = 1.0; // "no min observed"
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pub const SENTINEL_LOCKOUT: f32 = 0.0;
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// ── Structural constants (numerical-stability anchors per Invariant 1) ──────
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/// Sigmoid steepness base for Gate 1 (aux competence). At reliable signal
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/// (variance ≈ 0), k_aux = K_BASE_AUX. Decays toward K_MIN under noise.
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pub const K_BASE_AUX: f32 = 20.0;
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/// Sigmoid steepness base for Gate 2 (Q-head disagreement).
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pub const K_BASE_Q: f32 = 15.0;
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/// Lower bound for adaptive k (numerical floor; prevents flat sigmoid).
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pub const K_MIN: f32 = 1.0;
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/// Variance reference for k_aux adaptation (1% deviation → noisy regime).
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pub const VARIANCE_REF_AUX: f32 = 0.01;
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/// Variance reference for k_q adaptation (5% deviation → noisy regime).
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pub const VARIANCE_REF_Q: f32 = 0.05;
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/// Variance reference for β adaptation (1% α_grad_raw variance → smoother).
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pub const VARIANCE_REF_ALPHA: f32 = 0.01;
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/// Rate-limiter β base (light smoothing; ~2-step half-life on stable signal).
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pub const BETA_BASE: f32 = 0.5;
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/// Rate-limiter β max (heavy smoothing under volatile α_grad_raw).
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pub const BETA_MAX: f32 = 0.95;
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/// Schmitt-trigger hysteresis half-band: open at target+0.03, close at target-0.03.
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pub const SCHMITT_BAND: f32 = 0.03;
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/// Per-epoch warmup ramp duration (steps). Set at runtime from config; this
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/// constant is the FALLBACK if config lookup fails.
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pub const WARMUP_STEPS_FALLBACK: usize = 1000;
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/// Anti-gradient-hacking circuit breaker: aux_dir_acc must drop more than
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/// LOCKOUT_TRIGGER_DROP below open-threshold to suspect hacking.
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pub const LOCKOUT_TRIGGER_DROP: f32 = 0.05;
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/// q_disagreement must rise more than LOCKOUT_TRIGGER_DIS_RISE above baseline
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/// concurrently with the aux drop to confirm hacking suspicion.
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pub const LOCKOUT_TRIGGER_DIS_RISE: f32 = 0.10;
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/// Lockout duration (epochs).
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pub const LOCKOUT_EPOCHS: f32 = 2.0;
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/// Q-disagreement baseline (analytic random alignment under Hold/Flat masking).
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pub const Q_DISAGREEMENT_BASELINE: f32 = 0.5;
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pub const SP14_SLOT_BASE: usize = 383;
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pub const SP14_SLOT_END: usize = 396;
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@@ -349,3 +349,38 @@ function, not state.
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**Spec:** `docs/superpowers/specs/2026-05-04-sp11-reward-as-controlled-subsystem.md`
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**Plan:** `docs/superpowers/plans/2026-05-04-sp11-reward-as-controlled-subsystem.md`
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---
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## SP14 — Aux→Q Wire + Earned Gradient Flow [383..396)
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**13 slots** allocated in `sp14_isv_slots.rs` (B.1, 2026-05-05).
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Slots [381..383) were already claimed by SP13 closeout
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(`HOLD_RATE_TARGET_INDEX=381`, `HOLD_RATE_OBSERVED_EMA_INDEX=382`), so
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SP14 starts at 383 (shifted +2 from the original plan which documented
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[381..394)).
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| Slot | Constant | Reset | Notes |
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|------|----------|-------|-------|
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| 383 | `Q_DISAGREEMENT_SHORT_EMA_INDEX` | FoldReset (0.5) | K=4↔K=2 argmax mismatch fast EMA |
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| 384 | `Q_DISAGREEMENT_LONG_EMA_INDEX` | FoldReset (0.5) | K=4↔K=2 argmax mismatch slow EMA |
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| 385 | `K_AUX_ADAPTIVE_INDEX` | FoldReset (0.0→K_BASE_AUX) | Sigmoid steepness for Gate 1 (aux competence) |
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| 386 | `K_Q_ADAPTIVE_INDEX` | FoldReset (0.0→K_BASE_Q) | Sigmoid steepness for Gate 2 (Q-head disagreement) |
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| 387 | `BETA_RATE_LIMITER_ADAPTIVE_INDEX` | FoldReset (0.0→BETA_BASE) | Rate-limiter β (variance-driven) |
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| 388 | `AUX_DIR_ACC_VARIANCE_EMA_INDEX` | FoldReset (0.0) | Welford variance for k_aux adaptation |
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| 389 | `Q_DISAGREEMENT_VARIANCE_EMA_INDEX` | FoldReset (0.0) | Welford variance for k_q adaptation |
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| 390 | `ALPHA_GRAD_RAW_VARIANCE_EMA_INDEX` | FoldReset (0.0) | Welford variance for β adaptation |
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| 391 | `GATE1_OPEN_STATE_INDEX` | FoldReset (0.0) | Schmitt-trigger state (0=closed, 1=open) |
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| 392 | `ALPHA_GRAD_RAW_INDEX` | FoldReset (0.0) | Raw gate output (HEALTH_DIAG visibility) |
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| 393 | `ALPHA_GRAD_SMOOTHED_INDEX` | FoldReset (0.0) | Rate-limited gate consumed by backward path |
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| 394 | `AUX_DIR_ACC_POST_OPEN_MIN_INDEX` | FoldReset (1.0) | Post-open aux_dir_acc minimum (circuit breaker) |
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| 395 | `GRADIENT_HACK_LOCKOUT_REMAINING_INDEX` | FoldReset (0.0) | Lockout steps remaining (anti-gradient-hacking) |
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Slots 396-398 are conceptual buffer; no constants allocated.
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All 13 slots are FoldReset per `pearl_first_observation_bootstrap.md`.
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Producer + consumer wiring lands in B.2-B.12; B.1 is additive
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infrastructure only (no behavior change at this commit).
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**Spec:** `docs/superpowers/specs/2026-05-05-sp14-aux-q-wire-earned-gradient-flow.md`
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**Plan:** `docs/superpowers/plans/2026-05-05-sp14-aux-q-wire-earned-gradient-flow.md`
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