GPU-native MLP networks that use CudaLinear layers + cuBLAS sgemm
internally. These are drop-in replacements for the Candle-based
PolicyNetwork and ValueNetwork, providing the same forward/softmax/
log_softmax API surface but with zero Candle overhead.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
CUDA infrastructure in ml-core (cuda_compile, gpu/capabilities, gpu/l2_cache)
previously accessed cudarc types through candle_core::cuda_backend::cudarc --
a transitive re-export that coupled low-level CUDA driver calls to Candle.
Changes:
- Add cudarc 0.17 as direct optional dep (gated behind cuda feature)
- Replace all candle_core::cuda_backend::cudarc paths with direct cudarc::
- Generalize OOM detection to accept &dyn Debug (was &CandleError)
- Add generic computation_error_to_common_error() alongside legacy alias
Candle references: 163 -> 72 (remaining are autograd-dependent: Tensor,
Var, GradStore, VarBuilder -- cannot be replaced with cudarc raw ops)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Introduces the cuda_nn module as the foundation for eliminating Candle from
the ml-ppo crate. All primitives store weights as CudaSlice<f32> and use
cuBLAS sgemm for matrix multiplication, custom CUDA kernels for activations.
Components:
- GpuContext: shared cuBLAS handle + CUDA stream wrapper
- CudaLinear: fully connected layer via cuBLAS sgemm + bias-add kernel
- CudaLSTM: fused gate LSTM cell via cuBLAS + gate nonlinearity kernel
- CudaAdam: GPU-resident Adam optimizer (m/v state on GPU, single kernel per step)
- cuda_softmax/cuda_log_softmax: warp-shuffle numerically stable kernels
- cuda_relu/cuda_tanh/cuda_sigmoid: element-wise activation kernels
- CudaVec: GPU buffer wrapper with known length
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Update all callers to match the new pure-cudarc APIs introduced by the
hive agent CudaSlice migration. Key changes:
- GpuTrainingGuard::new() now takes Arc<CudaStream>; callers use from_device()
- check_and_accumulate/qvalue_stats/qvalue_divergence take &CudaSlice<f32>
instead of &Tensor; callers convert via tensor_to_cuda_slice_f32()
- accumulate_q_value takes f32 scalar, returns () (no Result)
- GpuReplayBuffer::insert_batch gains batch_size arg, takes CudaSlice params
- signal_adapter functions take &Arc<CudaStream> (cudarc 0.17 Arc requirement)
- Add tensor_to_cuda_slice_u32() and cuda_f32_to_tensor() utility functions
- Replace CudaView usage with owned CudaSlice via tensor_to_cuda_slice_f32()
- Fix CudaStorage.device field access (was method call in older API)
- Fix borrow-after-move in copy_actions_out via scoped DtoD copy
Zero errors, zero warnings across lib + tests + examples + full workspace.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
BranchingDuelingQNetwork now converts all weight tensors to F32 contiguous
at construction via ensure_f32_contiguous(). This guarantees the invariant
that extract_one/sync_one/reverse_sync_one in gpu_weights.rs can bypass
the flatten_all().to_dtype(F32).contiguous() Candle pipeline and do a
single direct DtoD memcpy from the Var's CUDA storage.
Key changes:
- branching.rs: add ensure_f32_contiguous() + ensure_f32() for NoisyLinear
sigma/epsilon, forward_branches casts to F32 instead of BF16
- noisy_layers.rs: sample_noise/reset_noise/disable_noise use weight_mu
dtype (F32 after ensure_f32) instead of hardcoded BF16, add ensure_f32()
to convert sigma vars and epsilon buffers
- gpu_weights.rs: extract_one/sync_one fast path skips Candle ops when
tensor is already F32 contiguous, reverse_sync_one fixed to access Var's
own CUDA storage directly (was writing to a temporary F32 tensor before)
- fused_training.rs: updated doc comments for CudaSlice-as-source-of-truth
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Eliminate ALL Candle Tensor usage from gpu_experience_collector.rs to fix
cross-stream deadlocks. The old code created Candle Tensors on the forked
CudaStream, which conflicted with Candle's default stream (stream 0) used
by GpuReplayBuffer::insert_batch.
Changes to gpu_experience_collector.rs:
- GpuExperienceBatch now holds CudaSlice<f32>/CudaSlice<i32> instead of Tensor
- Remove cuda_slice_to_tensor_f32() and cuda_slice_i32_to_tensor_u32() helpers
- Add dtod_clone_f32(), dtod_clone_i32() pure-cudarc DtoD copy helpers
- Add build_next_states_dtod() for episode-aware state shift via pointer math
- Remove device: &Device parameter from collect_experiences_gpu()
- Remove candle_core::{DType, Device, Tensor} import entirely
Changes to training_loop.rs:
- Move CudaSlice->Tensor conversion to training_loop boundary (post stream-sync)
- Add cuda_slice_to_tensor_f32() and cuda_slice_i32_to_tensor_u32() at boundary
- Conversions happen AFTER stream.synchronize(), on the synced stream -- no
cross-stream hazard
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
action.rs:
- Replace Tensor-based selector calls with CudaSlice extraction via
extract_cuda_f32! macro + ensure_contiguous_f32() helper
- Constructor now passes Arc<CudaStream> via stream_from_device()
- Replace per-element narrow+squeeze+to_scalar readback with bulk
readback_actions() DtoH memcpy (single transfer vs N scalar reads)
- select_actions_branching() now takes explicit batch_size parameter
metrics.rs:
- Same CudaSlice extraction pattern for validation action selection
- Wrap CudaSlice<u32> result back to Candle Tensor via cuda_u32_to_tensor()
for downstream GPU PnL/Sharpe computation that needs Tensor ops
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Eliminate all 26 Candle Tensor references from signal_adapter.rs.
Three functions (ppo_to_exposure_scores, signal_to_action_scores,
tft_quantile_to_signal) now take CudaSlice<f32> + CudaStream and
return CudaSlice<f32>, backed by three fused CUDA kernels in
signal_adapter_kernel.cu. Dead code evaluate_supervised_gpu_backtest
removed (zero callers). Added cuda_f32_to_tensor helper to
gpu_action_selector for DtoD copy back to Candle Tensor at API
boundaries (PPO hyperopt adapter, evaluate_baseline example).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
GpuReplayBuffer uses Candle Tensor ops (slice_scatter, cumsum, narrow)
which execute on Candle's default stream (stream 0). The experience
collector outputs data on a forked CudaStream. Without an explicit
synchronization barrier, the default stream may read partially-written
data from the forked stream, causing cross-stream deadlocks or data
corruption.
Add stream.synchronize() in three places:
- training_loop.rs: after experience collection, before insert_batch_tensors
- gpu_experience_collector.rs: cuda_slice_to_tensor_f32 after DtoD copy
- gpu_experience_collector.rs: cuda_slice_i32_to_tensor_u32 after DtoD copy
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
With unified forked stream, cudarc event tracking is self-referencing
(no cross-stream conflicts). disable_event_tracking caused more
problems than it solved — stale events, Drop failures, hangs.
Let cudarc manage events naturally on the single stream.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Moving disable_event_tracking() from GpuDqnTrainer::new() to the
stream fork in constructor.rs ensures ALL CudaSlice allocations
(experience collector, replay buffer, curiosity trainer) are created
with tracking already disabled. Previous placement caused hangs because
earlier allocations had stale events.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- upload_batch_gpu: BF16→F32 via CUDA kernel, no Candle to_dtype()
- IQL: reuses DQN trainer's F32 buffers via train_value_step_raw()
- Re-enable disable_event_tracking() — safe with unified stream
- Reduce smoke test epochs to 1 (debug mode is too slow for 3)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace all Candle tensor operations in the fused training loop with
pure cudarc CudaSlice operations to prevent Candle tensor Drops from
recording events on the default stream (which conflicts with our forked
training stream via cudarc event tracking).
Key changes:
- Re-enable disable_event_tracking() in GpuDqnTrainer::new() — safe now
that no Candle tensors are created during training
- Rewrite upload_batch_gpu(): BF16 states/next_states use DtoD + bf16→f32
kernel instead of Candle to_dtype(F32); F32 rewards/dones/weights use
direct DtoD copy with layout offset handling
- Load bf16_to_f32_kernel from training module (was defined in CUH but
not loaded)
- Add train_value_step_raw() to GpuIqlTrainer that takes CudaSlice<f32>
directly, bypassing Candle tensor manipulation
- IQL in fused training now reuses DQN trainer's already-converted F32
states_buf/rewards_buf instead of creating Candle temporaries
- Fix dtod_from_candle_f32/u32 to respect Candle layout start_offset
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Fork a dedicated CudaStream once in DQNTrainer constructor and share it
via Arc::clone with all GPU components (experience collector, fused
trainer, portfolio sim, monitoring). This eliminates:
1. Candle's default stream (stream 0) from the training hot path
2. Dual-stream cudarc event tracking conflicts during CUDA Graph capture
3. Implicit serialization points between default and forked streams
The fused training context no longer forks its own stream — it receives
the trainer's unified stream. With all GPU work on a single stream,
cudarc event tracking is safely disabled in GpuDqnTrainer::new(),
removing the cuStreamWaitEvent/cuEventRecord overhead that broke CUDA
Graph capture.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The fused DQN trainer uses a forked stream (for CUDA Graph capture)
while the experience collector + curiosity trainer use Candle's
default stream (stream 0). cudarc's context-wide event tracking
creates conflicts between the two streams.
disable_event_tracking() is context-wide — it fixes the forked
stream but breaks the default stream (curiosity trainer hangs).
Proper fix: create ONE forked stream at DQNTrainer construction,
pass it to ALL GPU components (experience collector, curiosity
trainer, portfolio sim, fused trainer). No Candle default stream
in the hot path.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace 13 per-feature toggle tests with 1 production-config test.
There is no code path without curiosity, IQN, branching, CQL, Kelly,
action masking, circuit breaker — these are always on in production.
smoke_params() now enables everything: Rainbow DQN + branching + IQN +
curiosity + CQL + Kelly + action masking + circuit breaker.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
DuelingQNetwork uses advantage_fc.* VarMap keys, but
GpuExperienceCollector expects branch_0_fc.* (branching always on).
Also remove stale use_noisy_nets/use_distributional fields.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
CI PVC structure is /data/test-data/ohlcv/ES.FUT, local is
test_data/ES.FUT. test_data_dir() now searches both layouts
and checks both FOXHUNT_TEST_DATA and TEST_DATA_DIR env vars.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Root cause 1 — CUDA_ERROR_ILLEGAL_ADDRESS:
shmem_max_in_dim only included trunk dims (state_dim, shared_h1,
shared_h2) but not head dims (value_h, adv_h). BF16 weight tile
for branch output overflowed shared memory on RTX 3050 (48KB).
Root cause 2 — CUDA_ERROR_INVALID_VALUE on EMA kernel:
cudarc 0.17's automatic event tracking records read/write events on
CudaSlice buffers. During CUDA Graph capture (events disabled) then
replay (events re-enabled), stale write events from CudaSlice Drops
poison the context error_state. Next bind_to_thread() propagates it.
Fix: disable_event_tracking() at GpuDqnTrainer construction —
single-owner forked stream, all sync points are explicit.
Also:
- Remove all #[ignore] from smoke tests, use real ES.FUT .dbn data
- Validate DBN schema at file level (skip non-OHLCV)
- Organize test_data/ into per-symbol subdirectories
- Fix pre-existing gpu_kernel_parity_test + evaluate_baseline errors
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
MBP-10 .dbn files mixed into test_data/ caused OHLCV loader to crash
on unknown RType 0x42. Now silently skips non-OHLCV records.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Root cause: shmem_max_in_dim only included trunk dims (state_dim,
shared_h1, shared_h2) but not head dims (value_h, adv_h). When
hidden_dim_base=32 made the trunk narrow while heads stayed at 128,
the BF16 weight tile for branch output (255×128=32640 BF16 elements)
overflowed the shared memory region (12288 BF16 elements). On H100
the overflow landed in unused-but-mapped hardware shmem (silent
corruption). On RTX 3050 (48KB physical shmem) it hit unmapped
memory → CUDA_ERROR_ILLEGAL_ADDRESS.
Changes:
- gpu_dqn_trainer.rs: shmem_max_in_dim includes value_h/adv_h
- Remove all #[ignore] from smoke tests (feature_coverage,
training_stability, gpu_residency)
- Smoke tests use real .dbn data from test_data/ (hard error if missing)
- Remove synthetic_data() fallback — no fake data in tests
- GPU-direct DtoD training path (train_step_gpu, FusedTrainScalars)
- GPU-native PER priority update kernel (zero CPU readback)
- IQN dual-head integration (gpu_iqn_head.rs)
- BF16 dtype fixes across 6 model adapters
- Hyperopt 30D→31D (iqn_lambda)
- portfolio_transformer: unconditional BF16 (remove dead CPU branches)
- liquid/adapter: all tests use Cuda(0) directly
- Fix pre-existing gpu_kernel_parity_test.rs (stale args)
- Fix pre-existing evaluate_baseline.rs (removed fields)
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- Remove ALL #[cfg(feature = "cuda")] guards (~400+ occurrences)
- Remove ALL #[cfg_attr(not(feature = "cuda"), ignore)] test annotations (~250)
- Make cuda default feature in 9 ML crates (ml, ml-core, ml-dqn, ml-ppo, etc.)
- Convert nvrtc JIT compilation to precompiled nvcc (searchsorted, prefix_sum)
- Move compile_ptx_for_device() to ml-core for shared access
- Delete dead CPU code: multi_step.rs, self_supervised_pretraining.rs,
training_guard_gpu_tests.rs, CPU PER buffer paths, CPU Q-diagnostics
- Replace unwrap_or(Device::Cpu) with hard errors everywhere
- Remove dead is_cuda() else branches in DQN/PPO/hyperopt trainers
- Change config defaults from "cpu" to "cuda" (rainbow, tlob, pipeline)
- Port IQL value network to GPU kernel (5 CUDA entry points)
- Port HER goal relabeling to GPU kernel (warp-per-sample)
- Wire DSR GPU-to-CPU sync in training loop
- cfg!(feature = "cuda") → true in inference_validator
Zero warnings, zero errors across entire workspace.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
After removing ensure_training_dtype(), forward methods that receive F32
inputs from tests/callers now fail with dtype mismatch against BF16 weights.
Add to_dtype(BF16) at forward entry of xLSTM (slstm, mlstm, block, network),
CfC cell, and diffusion time embedding. Fix quantization to accept BF16
tensors by casting to F32 before INT8 conversion. Update guard to catch
#[cfg(not(feature = "cuda"))] dead code. Bump DQN emergency_safe_defaults
replay_buffer_capacity from 1000 to 2048 (GPU PER floor = 1024).
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Delete every CPU fallback block across 14 files (-286 lines):
- dqn.rs: CPU replay buffer, tensor construction, PER fallback, gradient paths
- hyperopt/adapters/ppo.rs: CPU curiosity modules, trajectory generation
- hyperopt/adapters/dqn.rs: CPU backtest fallback, sync no-op
- trainers/ppo.rs: CPU training error stub
- l2_cache.rs: CPU stub functions (gate callers behind cuda too)
- replay_buffer_type.rs: CPU is_gpu_prioritized fallback
- validation/harness.rs: CPU regime breakdown fallback
- build.rs: cpu_only_build cfg (never referenced)
- evaluate_baseline.rs: CPU gpu_handled fallback
- testing/integration/gpu: CPU test stubs
Zero #[cfg(not(feature = "cuda"))] remains in the codebase.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
AutoReplaySizer inflated smoke test buffer_size=500 to 10M on H100 (75GB VRAM),
causing GPU PER empty-sample failures and multi-hour hangs. Root cause: the sizer's
100K minimum was always above the test buffer size, so the guard never triggered.
Fixes:
- constructor.rs: skip auto-sizing when buffer_size < 100K (sizer's own minimum)
- config.rs: insert_batch_tensors falls back to CPU PER (download + add_batch)
when GPU PER unavailable, instead of hard error
- train_step.rs: skip fused CUDA Graph init when GPU PER not active (stream
capture can't include CPU→GPU transfers from CPU PER sampling)
- dqn.rs: allow CPU tensor construction path on CUDA when GPU PER falls back;
remove hard errors in PER priority update (2 locations)
- metrics.rs: fix portfolio tensor shape (broadcast_left→expand for 2D concat);
add CPU PER fallback for Q-value statistics sampling
- agent.rs, entropy_regularization.rs: GPU-native Gumbel-max via Tensor::rand
(eliminates per-call CPU Vec allocation + GPU upload)
- smoke test helpers: defense-in-depth replay_buffer_vram_fraction = 0.0
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
nvcc (C++11 mode) parses `25f` as an attempt to use user-defined literal
suffix `f` instead of the standard float suffix. When V_MIN/V_MAX are
injected as integer-formatted values (e.g., `-25f` from Rust's Display
trait on f32), nvcc fails with "user-defined literal operator not found".
Fix: use `{v_min:.1}f` format to guarantee a decimal point (`-25.0f`),
which is unambiguously a float literal in all C++ standards.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Non-DQN kernels (curiosity, PPO, epsilon-greedy, backtest-PPO) include
common_device_functions.cuh but don't define SHARED_H1/SHARED_H2/VALUE_H/ADV_H.
The unguarded q_forward_dueling_warp_shmem() references these constants,
causing nvcc compilation failures (undefined identifiers + cascading
"user-defined literal operator not found" errors).
Wraps the function in #if defined(SHARED_H1) && defined(SHARED_H2) &&
defined(VALUE_H) && defined(ADV_H) ... #endif so it's only compiled
when the DQN architecture constants are injected.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The BF16 matvec helpers (warp_matvec_bf16_shmem, warp_matvec_bf16_broadcast_shmem)
call warp_reduce_sum_all which is defined later in the header. nvcc on H100
rejects this without a forward declaration — broke experience kernel compilation.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Argo artifact logs were stored in foxhunt-training-results which is
meant for model checkpoints. Separate bucket makes logs findable.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The test module used `super::*` but TradingState lives in
crate::dqn, not in the trainer module — broke `cargo test --lib`.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Remove ~850 lines of unreachable CPU fallback code from 3 hot-path files:
- hyperopt/dqn.rs: delete 250-line CPU backtest path (GPU eval mandatory)
- evaluate_baseline.rs: delete CPU PPO eval + non-CUDA fallback (147 lines)
- trainers/ppo.rs: delete 6 dead CPU rollout methods (~370 lines),
split train() into dispatcher + #[cfg(feature = "cuda")] train_gpu()
All .to_vec1() GPU hot-path guard violations eliminated.
GPU failures are now hard errors, not silent CPU fallbacks.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Unit tests need scalar readbacks for assertions — .to_scalar() is not
flagged but .to_vec1() in test modules would generate false positives.
Guard now correctly excludes inline #[cfg(test)] modules while checking
all production code including ensemble adapters.
Full --all scan reveals 31 pre-existing production violations across
ml-dqn, ml-ppo, ml-supervised, and ensemble adapters — separate cleanup.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The backtest_forward_kernel.cu calls q_forward_dueling_warp_shmem but
it was defined in dqn_experience_kernel.cu — a different compilation unit.
Move the function, TILE_LAYER_WARP_CLEAN macro, SHMEM_MIN and DIST_SIZE
to common_device_functions.cuh so both kernels can use them.
Add #ifndef guards to all macros to prevent redefinition warnings.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The CI toolkit (CUDA 12.9, PTX ISA 8.7) requires:
1. cp.async.bulk needs .mbarrier::complete_tx::bytes completion mechanism
(mandatory since PTX ISA 8.3 / CUDA 12.3)
2. mbarrier.try_wait.parity.acquire needs .cta scope qualifier between
.acquire and .shared::cta
Reverts the DISABLE_TMA workaround — TMA now compiles natively to cubin.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The CI CUDA toolkit's ptxas fails on TMA instructions (cp.async.bulk)
with "completion_mechanism modifier required". Prepend #define DISABLE_TMA 1
in compile_ptx_for_device() so ALL kernel compilations (experience collector,
backtest evaluator, PPO collector, curiosity trainer, action selector) use
the float4 cooperative load fallback instead of TMA.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
When commit-sha defaults to "HEAD", git checkout HEAD is a no-op — it keeps
the PVC's stale checkout. Now resolves HEAD to origin/{branch} after fetch,
ensuring the latest pushed code is always compiled.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
nvcc now produces cubin (native SASS) with -cubin -arch=sm_XX instead of
PTX with -ptx -arch=compute_XX. cuModuleLoad() loads SASS directly — zero
driver JIT. TMA instructions (cp.async.bulk on sm_90+) work natively because
nvcc handles them during offline compilation. Removed TMA fallback from
experience collector (double-compile + 15s retry overhead eliminated).
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
train_baseline_rl doesn't accept --initial-capital (only hyperopt and
evaluate binaries do). Removing it fixes the exit code 2 in DQN
hyperopt v3 train-best step.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Cast all Tensor::full() / Tensor::from_vec() call sites to training_dtype
instead of defaulting to F32. Fixes dtype mismatch errors (BF16 vs F32)
in PPO training on CUDA:
- tensor_ops: scalar_mul, clamp, normalize match operand dtype
- trajectories: TrajectoryBatch/MiniBatch to_tensors cast to training dtype
- continuous_ppo: ContinuousTrajectoryBatch/MiniBatch to_tensors cast
- adaptive_entropy: cast entropy to F32 for alpha multiplication boundary
- continuous_policy: forward() input cast, Tensor::full scalars match dtype
- flow_policy: sample_base_noise cast to training dtype
- hidden_state_manager: reset tensors use training_dtype
- ensemble/ppo adapter: predict input cast to training dtype
- trainable_adapter: test uses training_dtype instead of hardcoded F32
Verified: 198/198 ml-ppo tests pass, 63/63 ml PPO tests pass.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- backtest_forward_kernel: dim_overrides must precede common_device_functions.cuh
which has #error guards requiring STATE_DIM/MARKET_DIM/PORTFOLIO_DIM to be
defined before inclusion. Experience collector already had correct ordering.
- Cap MAX_EPISODES from 8192→4096 (diminishing returns above 4096, wastes walltime)
- Cap trainer .min() from 0x8000 (32768) → 4096 to match
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
